Real Time Devices AD1200 User Manual page 102

inbr
82C54
1) lnitiates
counting
2) Resets output
aft€r next
clock
Flgure 21. Gate Pln Operailons Summary
Operation Common to All Modes
Programmlng
When a Gontrol Word is written to a Counter, atl
Control Logic is immediately reset and OUT goes to
a known initial state; no CLK pulses are required for
this.
GATE
The GATE input is always sampled on the rising
edge of CLK. In Modes 0, 2, 3, and 4 the GATE inpu-t
is level sensitive, and the logic level is sampled on
the rising edge of CLK. In Modes 1,2, g, and 5 the
GATE input is rising-edge sensitive. In these Modes,
a rising -9dge of GATE (trigger) sets an edge-sensi-
tive flip-flop in the Counter. This flip-flop is then sam-
pled on the next rising edge of CLK; the flip-flop is
reset immediately after it is sampled. ln this way, a
trigger will be detected no matter when it occurs_a
high logic level does not have to be maintained until
the next rising edge of CLK. Note that in Modes 2
and 3, the GATE input is both edge- and level-sensi-
tive. In Modes 2 and 3, if a CLK source other than
the system clock is used, GATE should be pulsed
immediately following WF of a new count value.
COUNTER
New counts are loaded and Counters are decre-
mented on the falling edge of CLK.
The largest possible initial count is O; this is equiva-
lent to 216 lor binary counting and 104 for BCD
counting.
The Counter does not stop when it reaches zero. In
Modes 0, 1,4, and 5 the Counter,?raps around" to
the highest count, either FFFF hex for binarv count-
ing or 9999 for BCD counting, and continuei count-
ing. Modes 2 and 3 are periodic; the Counter reloads
itself with the initial count and continues counting
from there.
MODE
MIN
COUNT
lrlAX
COUNT
0
1 0
1 1
0
2
2
0
3
2 0
4
1 0
NOTE:
0 is equivalent to 216 for binary counting and 104 for
BCD counting
Figure 22. ilinlmum and Marlmum InlilalCounts