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3 7 63 1515 0
• IC4004
GATE ARRAY (MSM10S0110-122TS-K) / PICTURE BOARD (2/3)
Pin No.
Pin Name
1
SEL
2
IRD3
3
IWR3
4
DREQ IR
5
IR AEN
6
DACK IR
7
H CS IR
8
H CS IR S
9
GND
10
RST OUT
11
—
12
RST
13
VCC
14
—
15
—
16
VCC
17
DMA SEL0
18
DMA SEL1
19
DRQ M1
20
—
21
—
TE
L 13942296513
22
CS SRAM
23
—
24
—
25 ~ 34
HA10 ~ HA1
35
GND
36
MD36050X DREQ
37
BE 50
38
GND
39
XIRD2
40
XIWR2
41
X CS 50
42
VCC
43
DACK 50
44
XBE M1
45
BUFDIR
46
—
47
DACK M1
48
—
49
XH CS M1
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I/O
I
ROM selection input. "H": External ROM. "L": ROM on board. (Fixed to "H")
O
IRDA I/O read signal output
O
IRDA I/O write signal output
I
DMA request signal input (IRDA)
O
IRDA address enable signal output
O
DMA acknowledge signal output (IRDA)
O
Chip select output (IRDA)
O
—
Ground
O
Reset output to IRDA and I/O expansion
—
Not used
I
Reset input
—
Power supply (+5 V)
—
Not used
—
—
Power supply (+5 V)
I
DMA select signal 0 input
I
DMA select signal 1 input
I
DMA request signal input from system microprocessor CPU
—
Not used
—
O
Chip select signal output to SRAM
—
Not used
—
O
Address bus signal output (System microprocessor CPU, JPEG image compression/expansion processing)
—
Ground
O
DMA request signal to JPEG image compression/expansion processing
O
Bus buffer enable signal output
—
Ground
O
I/O read signal output
O
I/O write signal output
O
Chip select output to JPEG image compression/expansion processing
—
Power supply (+5 V)
O
DMA acknowledge signal output to JPEG image compression/expansion processing
O
Bus buffer enable signal output
O
Bus buffer input/output select output
—
Not used
O
DMA acknowledge signal output to system microprocessor CPU
—
Not used
O
Chip select output to JPEG image compression/expansion processing
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2 9
8
Description
Q Q
3
6 7
1 3
1 5
co
.
— 135 —
9 4
2 8
0 5
8
2 9
9 4
2 8
m
9 9
9 9
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