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QQ
3 7 63 1515 0
Pin No.
Pin Name
58 ~ 62
HDB7 ~ HDB3
63
VSS
64 ~ 66
HDB2 ~ HDB0
67
XHRD
68
XHWR
69
HDRQ/XSAC
70
XHAC/SDRQ
71
VSS
72
NC
73
NC
74
A6
75
TEST
76
VDD
77
VSS
78 ~ 83
A0 ~ A5
84 ~ 87
DB0 ~ DB3
88
VSS
89 ~ 92
DB4 ~ DB7
93
XINT
94
XWR
95
XRD
TE
L 13942296513
96
XCS
97
VSS
98
XRST
99
NC
100
NC
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I/O
I/O
Host data bus
—
Ground
I/O
Host data bus
I/O
Data read strobe signal input/output from host or to IRDA
I/O
Data write strobe signal input/output from host or to IRDA
O
Data request output to host, or data acknowledge output to IRDA
I
Data acknowledge input from host, or data request input from IRDA
—
Ground
—
Not used
—
Not used
I
CPU address input
O
Test signal input
—
Power supply (+5 V)
—
Ground
I
CPU address input
I/O
CPU data bus
—
Ground
I/O
CPU data bus
O
Interrupt request output to system control
I
Internal register write strobe input from system control
I
Internal register read strobe input from system control
I
Chip select input from system control
—
Ground
I
Reset input
—
Not used
—
Not used
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http://www.xiaoyu163.com
2 9
8
Description
Q Q
3
6 7
1 3
1 5
co
.
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9 4
2 8
0 5
8
2 9
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