Sony DPA-300 Service Manual page 62

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• IC108 VIDEO INPUT CONTROL MICROPROCESSOR (CXP81120-032R) / VIDEO-IN BOARD
Pin No. Pin Name I/O
1, 2 HA1, HA0 O
3 CS O
4 RD O
5 WR O
6 RSTO O
7 ~ 14 D7 ~ D0 I/O
15 ~ 22 HD7 ~ HD0 I/O
23 — I
24 XTALO O
25 XTALI I
26 VSS —
27 RSTI I
28 — I
29 ODD/EVEN I
30 — O
31 VSYNC I/O
32 AVSS —
33 — I
34 AVDD —
35 — O
36 HSTBO O
TE
L 13942296513
37 I/O SEL O
38 HCLR O
39 HHDET I
40 HLDET I
41 HSTBI I
42 — I
43, 44 — O
45 INT I
46 DREQ I
47, 48 — I/O
49 IICDATA I/O
50 IICCLK O
51 ~ 55 — O
56 NC —
57 VDD —
58 VSS —
59 ,60 — O
61 SEL-S/C O
62 SEL-P/F O
63 — O
64 DACK O
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I/O address output to JPEG encoder/decoder
Chip select output to JPEG encoder/decoder
Data read signal output to JPEG encoder/decoder
Data write signal output to JPEG encoder/decoder
Reset output to JPEG encoder/decoder
Data input/output to JPEG encoder/decoder
Data input/output with host controller
Not used
Clock output (16 MHz)
Clock input (16 MHz)
Ground
Reset input. "L": reset
Not used
Used field identification input
Not used
Vertical sync signal input/output
Analog Ground
Reference voltage input (+5 V)
Analog power supply (+5 V)
Not used
Strobe signal output to host controller
Data input/output selection output. "H": Output
Clear signal output. "L": Clear
H signal detection input from host controller
L signal detection input from host controller
Strobe signal input from host controller
Not used
Not used
End signal input from JPEG encoder/decoder. "L": End
Data transfer request input from JPEG encoder/decoder. "L": Request
Not used
IIC control data input/output with front end
IIC control clock output to front end
Not used
Not used
Power supply (+5 V)
Ground
Not used
Chip select signal output to video switch
Chip select signal output to video switch
Not used
Acknowledge signal output to JPEG encoder/decoder. "L": Acknowledge
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Description
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