Isbx Bus Connector J3 And J4 Pin Assignments - Intel iSBC 86/14 Hardware Reference Manual

PREPARATION FOR USE
Table 2-31 provides the iSBX bus connector pin assignments, and Table
2-32 provides descriptions of iSBX bus signals as found on both J3 and
J4. Each of the connectors has identical pin assignments, functions, and
physical layout.
Table 2-31. iSBX- Bus Connector J3 and J4 Pin Assignments
Pin
Mnemonic
Description Pin Mnemonic
Description
1
+12V
+12 volts
2 -12V
-12 volts
3 GND Ground
4 +5V
+5 volts
5
MRESET
Module Reset
6 MCLK Module Clock
7 MA2 Address Bit 2 8 MPST/ Module Presen t
9
MAl Address Bit 1 10 Reserved
11 MAO Address Bit 0
12
MINTR1
Module Interrupt 1
13
IOWRT/ I/O Write Command 14 MINTRO
Module Interrupt 2
15 IORD/ I/O Read Command
16
MWAIT/ Wait-state Request
17 GND
Ground
18 +5V +5 volts
19
MD7
Module Data Bit 7 20
MCS1/
Module Chip Select 1
21
MD6 Module Data Bit 6
22
MCSO/
Module Chip Select 0
23 MDS
Module Data Bit 5
24
Reserved
25 MD4 Module Data Bit 4 26 Reserved
27 MD3 Module Data Bit 3 28 OPT1 Option Line 1
29 MD2 Module Data Bit 2 30 OPTO Option Line 0
31 MD1 Module Data Bit 1
32 Reserved
33
MDO Module Data Bit 0
34 Reserved
35 GND
Ground
36 +5V +5 volts
37 MDE
Module Data Bit E 38 MDF Module Data Bit F
39 MDC Module Data Bit C 40 MDD Module Data Bit D
41 MDA Module Data Bit A 42 MDB Module Data Bit B
43 MD8 Module Data Bit 8 44 MD9 Module Data Bit 9
2-74