Oki OKIFAX 5750 Maintenance Manual page 478

A3.2 OPE Control
The rough block diagram of the OPE panel is shown below.
MCNT board
CPU
Host Interface
Between the MCNT and OPE, serial data is transferred via the SIO incorporated in the CPU.
<Communication method>
1) Communication method:
2) Transfer rate:
3) Data length:
<Data configuration>
1) Status bit:
2) Data:
3) Even parity:
4) Stop bits:
Error = ±5%
D0
START
BIT
41285901TH Rev.3
CN15 CN1
TXD
RXD
Start-stop synchronization
5832 bps
8 bits
1 bit
8 bits
1 bit (ignored by OPE)
Bits 1 and 5
D1 D2 D3 D4
OPE board
CPU
D5 D6 D7
LCD
LED
KEY
SCAN
EVEN
PARITY
STOP
BIT
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