Intel S1200V3RP Technical Product Specification page 236

Appendix B: Integrated BMC Sensor Tables
Full Sensor Se Platform
Name ns Applicabilit
(Sensor name or y
in SDR) #
(IPMI
Watchdog)
Chassis
Physical
Intrusion
Security
04
is
h
(Physical
chassis-
Scrty)
specific
FP Interrupt
05 Chassis -
(FP NMI
h specific
Diag Int)
SMI Timeout
06
All
(SMI
h
Timeout)
System
Event Log
07
All
h
(System
Event Log)
System
Event
08
All
h
(System
Event)
Button
09
Sensor All
h
(Button)
0
BMC
A All
Watchdog
h
Voltage
Regulator
0
Watchdog
B All
h
(VR
Watchdog)
Fan
Redundancy
0
1
Chassis-
C
specific
(Fan
h
Redundancy
)
222
Sensor Event/R Event Offset Triggers
Type eading
Type
23h c 01 - Hard reset
6Fh
02 - Power down
03 - Power cycle
08 - Timer interrupt
Physica 00 - Chassis intrusion
Sensor
l
04 - LAN leash lost
Specifi
Securit
c
y
6Fh
05h
Critical Sensor 00 - Front panel
Interrup Specifi NMI/diagnostic
t c interrupt
13h 6Fh
01 – State asserted
SMI Digital
Timeou Discret
t e
F3h 03h
Event
Loggin Sensor
g Specifi
02 - Log area
Disable c
reset/cleared
d
6Fh
10h
Sensor
02 - Undetermined
System
Specifi
system H/W failure
Event
c
04 – PEF action
12h
6Fh
00 – Power Button
Sensor
Button/
Specifi
02 – Reset Button
Switch
c
14h
6Fh
Mgmt Digital
System Discret
01 – State Asserted
Health e
28h 03h
Digital
Discret
Voltage
01 – State Asserted
e
02h
03h
00 - Fully redundant
01 - Redundancy lost
Generi
Fan
c
04h
02 - Redundancy
0Bh
degraded
03 - Non-redundant:
Intel® Server Board S1200V3RP TPS
Contrib. Assert Reada
To /De- ble
System assert
Status Value/
Offset
s
Degrad
As
–
ed
and
De
OK
–
OK As
As
–
Fatal and
De
–
OK As
Fatal
As
and
-
OK De
As
OK AS _
Degrad
–
As
ed
As
–
Fatal and
De
OK
Degrad
As
ed
–
and
Degrad
De
ed
Degrad
Event Rearm St
Data an
db
y
Trig
A X
Offset
Trig
–
A
Offset
Trig
–
A
Offset
Trig
A X
Offset
Trig
A X
Offset
Trig
A X
Offset
Trig
A -
Offset
Trig
M X
Offset
Trig
–
A
Offset
Revision 1.2