Intel S1200V3RP Technical Product Specification page 243

Intel® Server Board S1200V3RP TPS
Full Sensor Se Platform
Name ns Applicabilit
(Sensor name or y
in SDR) #
Thermal h specific
Margin
(P4 Therm
Margin)
Processor 1
Thermal
78
Control %
All
h
(P1 Therm
Ctrl %)
Processor 2
Thermal
79
Control %
All
h
(P2 Therm
Ctrl %)
Processor 3
Thermal
7
Platform-
Control %
A
specific
h
(P3 Therm
Ctrl %)
Processor 4
Thermal
7
Platform-
Control %
B
specific
h
(P4 Therm
Ctrl %)
Processor 1
7
ERR2
C All
Timeout
h
(P1 ERR2)
Processor 2
7
ERR2
D All
Timeout
h
(P2 ERR2)
Processor 3
7
ERR2
Platform-
E
Timeout
specific
h
(P3 ERR2)
Processor 4
7
ERR2
Platform-
F
Timeout
specific
h
(P4 ERR2)
Catastrophic
80
Error
All
h
(CATERR)
All
Processor1 81
Revision 1.2
Sensor Event/R Event Offset Triggers
Type eading
Type
ature old
01h 01h
Temper Thresh
ature old
[u] [c,nc]
01h 01h
Temper Thresh
ature old
[u] [c,nc]
01h 01h
Temper Thresh
ature old
[u] [c,nc]
01h 01h
Temper Thresh
ature old
[u] [c,nc]
01h 01h
Digital
Proces
Discret
01 – State Asserted
sor
e
07h
03h
Digital
Proces
Discret
01 – State Asserted
sor
e
07h
03h
Digital
Proces
Discret
sor 01 – State Asserted
e
07h
03h
Digital
Proces
Discret
sor 01 – State Asserted
e
07h
03h
Digital
Proces
Discret
sor 01 – State Asserted
e
07h
03h
01 – State Asserted
Proces Digital
Appendix B: Integrated BMC Sensor Tables
Contrib. Assert Reada
To /De- ble
System assert
Status Value/
Offset
s
g
nc =
Degrad
As
ed
Analo
and
g
c =
De
Non-
fatal
nc =
Degrad
As
ed
Analo
and
g
c =
De
Non-
fatal
nc =
Degrad
As
ed
Analo
and
g
c =
De
Non-
fatal
nc =
Degrad
As
ed
Analo
and
g
c =
De
Non-
fatal
As
–
fatal and
De
As
–
fatal and
De
As
–
fatal and
De
As
–
fatal and
De
As
–
fatal and
De
–
fatal
As
Event Rearm St
Data an
db
y
Trig
–
A
Offset
Trig
–
A
Offset
Trig
–
A
Offset
Trig
–
A
Offset
Trig
–
A
Offset
Trig
–
A
Offset
Trig
–
A
Offset
Trig
–
A
Offset
Trig
–
M
Offset
–
M
Trig
229