Figure 52. Turn On/Off Timing (Power Supply Signals) - Intel S1200V3RP Technical Product Specification

Server Board Power Distribution
Item
T Delay from PSON# deactivate to PWOK being
pson_pwok
de-asserted.
T Delay from output voltages within regulation
pwok_on
limits to PWOK asserted at turn on.
T Delay from PWOK de-asserted to output
pwok_off
voltages (3.3V, 5V, 12V, -12V) dropping out of
regulation limits.
T Duration of PWOK being in the de-asserted state
pwok_low
during an off/on cycle using AC or the PSON
signal.
T Delay from 5VSB being in regulation to O/Ps
sb_vout
being in regulation at AC turn on.
T Time the 5VSB output voltage stays within
5VSB_holdup
regulation after loss of AC.
AC Input
Vout
T
AC_on_delay
T
sb_on_delay
PWOK
5VSB
T
sb_vout
PSON
AC turn on/off cycle
218
Description
T
vout_holdup
T
pwok_off
T
pwok_on
T
pwok_holdup
T
5VSB _ holdup

Figure 52. Turn On/Off Timing (Power Supply Signals)

Intel® Server Board S1200V3RP TPS
Min. Max.
50
100 500
1
100
10 1000
70
T
pwok_low
T
T
sb_on_delay
pwok_on
T
pson_on_delay
PSON turn on/off cycle
Units
ms
ms
ms
ms
ms
ms
T
pwok_off
T
pson_pwok
Revision 1.2