National Instruments DAQ PCI E Series User Manual page 7

Table of Contents
Glossary
Index
Figures
Figure 1-1.
Figure 3-1.
Figure 3-2.
Figure 3-3.
Figure 3-4.
Figure 3-5.
Figure 3-6.
Figure 3-7.
Figure 3-8.
Figure 3-9.
Figure 3-10. High-Hysteresis Analog Triggering Mode............................................ 3-16
Figure 3-11. Low-Hysteresis Analog Triggering Mode ............................................ 3-17
Figure 3-12. CONVERT* Signal Routing ................................................................. 3-18
Figure 3-13. RTSI Bus Signal Connection ................................................................ 3-20
Figure 4-1.
Figure 4-2.
Figure 4-3.
Figure 4-4.
Figure 4-5.
Figure 4-6.
Figure 4-7.
Figure 4-8.
Figure 4-9.
Figure 4-10. Digital I/O Connections......................................................................... 4-25
Figure 4-11. Timing I/O Connections ........................................................................ 4-27
Figure 4-12. Typical Posttriggered Acquisition......................................................... 4-28
Figure 4-13. Typical Pretriggered Acquisition .......................................................... 4-29
Figure 4-14. SCANCLK Signal Timing .................................................................... 4-29
Figure 4-15. EXTSTROBE* Signal Timing .............................................................. 4-30
Figure 4-16. TRIG1 Input Signal Timing .................................................................. 4-31
Figure 4-17. TRIG1 Output Signal Timing................................................................ 4-31
PCI E Series User Manual
The Relationship between the Programming Environment,
NI-DAQ, and Your Hardware ............................................................... 1-4
PCI-MIO-16E-1, PCI-MIO-16E-4 and PCI-6071E Block Diagram..... 3-1
PCI-MIO-16XE-10 and PCI-6031E Block Diagram ............................ 3-2
PCI-6032E and PCI-6033E Block Diagram.......................................... 3-3
PCI-MIO-16XE-50 Block Diagram ...................................................... 3-4
Dither..................................................................................................... 3-10
Analog Trigger Block Diagram............................................................. 3-14
Below-Low-Level Analog Triggering Mode ........................................ 3-15
Above-High-Level Analog Triggering Mode ....................................... 3-15
Inside-Region Analog Triggering Mode ............................................... 3-16
I/O Connector Pin Assignment for the PCI-MIO-16E-1,
PCI-MIO-16E-4, PCI-MIO-16XE-50, PCI-MIO-16XE-10,
and PCI-6032E ...................................................................................... 4-2
I/O Connector Pin assignment for the PCI-6071E, 6031E,
and 6033E.............................................................................................. 4-3
PCI E Series PGIA ................................................................................ 4-13
Summary of Analog Input Connections ................................................ 4-15
Differential Input Connections for Ground-Referenced Signals........... 4-17
Differential Input Connections for Nonreferenced Signals................... 4-18
Single-Ended Input Connections for Nonreferenced
or Floating Signals................................................................................. 4-21
Single-Ended Input Connections for Ground-Referenced Signals........ 4-22
Analog Output Connections .................................................................. 4-24
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