LCD Controller
(PIXPOL) bits to 1, respectively. The LLP and LFLM timing are similar for all panel modes
supported by LCDC.
In additional to the interface timing pins discussed above, an alternate crystal direction
(LACD) pin in LCDC will toggle after a pre-programmed number of LFLM pulses. This pin
prevents crystal degradation in the LCD panel.
MOTOROLA
MC68328 DRAGONBALL PROCESSOR USER'S MANUAL
4-5