System Integration Module
31
30
29
28
AC23
AC22
AC21
AC20
15
14
13
12
AM23
AM22
AM21
AM20
Address: $(FF)FFF130, 134, 138, 13C, 140, 144, 148, 14C
Figure 2-12. Chip-Select Registers for Group C and D
Chip selects in group A and B (i.e. CSA0, CSA1, CSA2, CSA3, CSB0, CSB1, CSB2, CSB3)
decode address A23-A16 (minimum 64K of space). Chip selects in group C and D decode
address A23-A12 (minimum 4K of space).
ADDRESS COMPARE 23-16 (Group A, B)
This bit field is the address-compare field. A group address match and a match of address
bits 23-16 generate this chip-select. Notice some of the address bits overlap in the group
base address/mask registers and the chip-select register. This allows for a large group to
be selected and for chip-select to be finely decoded.
ADDRESS MASK 23-16
This field masks corresponding bits in the address-compare field. A ''1'' forces a true com-
parison (don't care) on the corresponding bit.
ADDRESS COMPARE 23-12 (Group C, D)
This bit field is the address-compare field. A group address match and a match of address
bits 23-12 generate this chip-select.
ADDRESS MASK 23-12
This field masks corresponding bits in the address compare field. A "1" forces a true com-
parison (don't care) on the corresponding bit.
BSW
Bus Width
This bit sets the bus width for this chip-select area.
0 = 8-bit
1 = 16-bit
RO
Read Only
This bit sets the chip-select to read only. Otherwise, read and write accesses are allowed.
Writes to read-only areas generate a bus error.
0 = Read/Write
1 = Read Only
2-18
MC68328 DRAGONBALL PROCESSOR USER'S MANUAL
27
26
25
24
ADDRESS COMPARE 23-12
AC19
AC18
AC17
AC16
11
10
9
8
ADDRESS MASK 23-12
AM19
AM18
AM17
AM16
23
22
21
20
AC15
AC14
AC13
AC12
7
6
5
4
AM15
AM14
AM13
AM12
19
18
17
16
UNUSED
BSW
-
-
-
-
3
2
1
0
RO
WAIT
-
-
-
-
Reset Value: $00010006
MOTOROLA