CLKO
DATA IN
DATA OUT
Figure 6-16. Parallel I/O Data-In/Data-Out Timing Diagram
6.16 AC ELECTRICAL SPECIFICATIONS—INTERRUPTS
(seeFigure 6-17)
Num.
Interrupt Pulse Width Low IRQ (Edge Trig-
190
gered Mode) or PB8-11
191
Minimum Time Between Active Edges
NOTE: Setup time for the asynchronous inputs IPL2–IPL0 and AVEC guarantees their recognition at the next falling
edge of the clock.
MOTOROLA
180
CPU WRITE (S6) OF PORT DATA, CONTROL, OR DIRECTION REGISTER
Characteristic
IRQ
(INPUT)
Figure 6-17. Interrupts Timing Diagram
MC68302 USER'S MANUAL
181
182
16.67 MHz
Symbol
Min
Max
t
50
—
IPW
t
3
—
AEMT
190
191
Electrical Characteristics
20 MHz
25 MHz
Min
Max
Min
Max
42
—
34
—
3
—
3
—
Unit
ns
clk
6-27