General Description; Block Diagram - Motorola MC68302 User Manual

Integrated multiprotocol processor
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SECTION 1

GENERAL DESCRIPTION

The MC68302 integrated multiprotocol processor (IMP) is a very large-scale integration (VL-
SI) device incorporating the main building blocks needed for the design of a wide variety of
controllers. The device is especially suitable to applications in the communications industry.
The IMP is the first device to offer the benefits of a closely coupled, industry-standard
M68000 microprocessor core and a flexible communications architecture. The IMP may be
configured to support a number of popular industry interfaces, including those for the Inte-
grated Services Digital Network (ISDN) basic rate and terminal adaptor applications. Con-
current operation of different protocols is easily achieved through a combination of
architectural and programmable features. Data concentrators, line cards, modems, bridges,
and gateways are examples of suitable applications for this device.
The IMP is a high-density complementary metal-oxide semiconductor (HCMOS) device con-
sisting of an M68000 microprocessor core, a system integration block (SIB), and a commu-
nications processor (CP).

1.1 BLOCK DIAGRAM

The block diagram is shown in Figure 1-1.
By integrating the microprocessor core with the serial ports (in the CP) and the system pe-
ripherals (in the SIB), the IMP is capable of handling complex tasks such as all ISDN basic
rate (2B + D) access tasks. For example, the IMP architecture and the serial communica-
tions controller (SCC) ports can support the interface of an S/T transceiver chip and the low-
er part (bit handling) ISO/OSI layer-2 functions. Other layer-2 functions and the higher
protocol layers would then be implemented by software executed by the M68000 core.
Using the flexible memory-based buffer structure of the IMP, terminal adaptor applications
also can be supported by transforming and sharing data buffer information between the
three SCC ports and the serial communications port (SCP). Each SCC channel is available
1
, UART, BISYNC, DDCMP
for HDLC/SDLC
vides a number of choices for various rate adaptive techniques and can be used for func-
tions such as a terminal controller, multiplexer, or concentrator.
1.
SDLC is a trademark of International Business Machines.
2.
DDCMP is a trademark of Digital Equipment Corporation.
MOTOROLA
2
, V.110, or transparent operation. The IMP pro-
MC68302 USER'S MANUAL
1-1

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