24.4
Flash Memory Control Status Register (FMCS)
This section shows the function of the flash memory control status register (FMCS).
Flash Memory Control Status Register (FMCS)
7
6
Address:
RDY
0000AE
INTE
H
INT
R/W
R/W
R/W
: Read/Write
R
: Read only
W
: Write only
X
: Undefined
: Reset value
Figure 24.4-1 Flash Memory Control Status Register (FMCS)
0
5
4
3
2
1
Re-
Re-
Re-
Re-
WE RDY
served
served
served
served
R/W
R
R/W R/W R/W R/W
CHAPTER 24 512K-BIT FLASH MEMORY
Reset value
000X0000
B
bit0
Reserved
0
Always set to "0"
bit1
Reserved
0
Always set to "0"
bit2
Reserved
0
Always set to "0"
bit3
Reserved
0
Always set to "0"
bit4
RDY
Flash memory programming/erasing status bit
0
Programming/erasing (next data programming/erasing disabled)
1
Programming/erasing terminated (next data programming/erasing enabled)
bit5
WE
Flash memory programming/erasing enable bit
0
Programming/erasing flash memory area disabled
1
Programming/erasing flash memory area enabled
bit6
RDYINT
Flash memory operation flag bit
Read
0
Programming/erasing
1
Programming/erasing terminated
bit7
INTE
Flash memory programming/erasing interrupt enable bit
0
Interrupt disabled at end of programming/erasing
1
Interrupt enabled at end of programming/erasing
Reserved bit
Reserved bit
Reserved bit
Reserved bit
Write
This RDYIN bit cleared
No effect
535