Explanation Of Operation Of Watch Timer - Fujitsu F2MCTM-16LX Hardware Manual

CHAPTER 15 WATCH TIMER
15.5

Explanation of Operation of Watch Timer

The watch timer operates as an interval timer or an oscillation stabilization wait time
timer of subclock. It also supplies an operation clock to the watchdog timer.
Watch Timer Counter
The watch timer counter continues incrementing in synchronization with the subclock (SCLK) while the
subclock (SCLK) is operating.
Clearing watch timer counter
The watch timer counter is cleared to "0000
• A power-on reset occurs.
• The mode transits to the stop mode.
• The watch timer clear bit (WTR) in the watch timer control register (WTC) is set to "0".
Note:
When the watch timer counter is cleared, the interrupts of the watchdog timer and interval timer that use
the output of the watch timer counter are affected.
To clear the watch timer by writing zero to the watch timer clear bit (WTR) in the watch timer control
register (WTC), set the overflow interrupt enable bit (WTIE) in the WTC register to "0" and set the watch
timer to interrupt inhibited state. Before permitting an interrupt, clear the interrupt request issued by
writing zero to the overflow flag bit (WTOF) in the WTC register.
Interval Timer Function
The watch timer can be used as an interval timer by generating an interrupt at each interval time.
Settings when using watch timer as interval timer
Operating the watch timer as an interval timer requires the settings shown in Figure 15.5-1 .
• When the value set by the interval time select bits (WTC1, WTC0) in the watch timer control register
(WTC) is reached, the overflow flag bit in the WTC register is set to "1" (WTC:WTOF = 1).
• When the overflow flag bit is set (WTC:WTOF = 1) with the overflow interrupt of the watch timer
counter enabled (WTC:WTIE = 1), an interrupt request is generated.
• The overflow flag bit (WTC:WTOF) is set when the interval time is reached at the starting point of the
timing at which the watch timer is finally cleared.
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Figure 15.5-1 Setting of Watch Timer
WTC
: Used bit
: Unused bit
" when:
H
bit7 6 5 4 3
WDCS
SCE WTIE WTOF WTR
2 1
bit0
WTC2 WTC1 WTC0