Fsb Signal Groups; Fsb Pin Groups - Intel P8700 - Core 2 Duo Processor Datasheet

3.7

FSB Signal Groups

The FSB signals have been combined into groups by buffer type in the following
sections. In this document, the term "AGTL+ Input" refers to the AGTL+ input group as
well as the AGTL+ I/O group when receiving. Similarly, "AGTL+ Output" refers to the
AGTL+ output group as well as the AGTL+ I/O group when driving.
With the implementation of a source-synchronous data bus, two sets of timing
parameters are specified. One set is for common clock signals, which are dependent
upon the rising edge of BCLK0 (ADS#, HIT#, HITM#, etc.), and the second set is for
the source-synchronous signals which are relative to their respective strobe lines (data
and address) as well as the rising edge of BCLK0. Asychronous signals are still present
(A20M#, IGNNE#, etc.) and can become active at any time during the clock cycle.
Table 4 identifies which signals are common clock, source synchronous, and
asynchronous.
Table 4.

FSB Pin Groups

Signal Group
AGTL+ Common
Clock Input
AGTL+ Common
Clock I/O
AGTL+ Source
Synchronous
I/O
AGTL+ Strobes
CMOS Input
Open Drain
Output
Open Drain I/O
CMOS Output
CMOS Input
Open Drain
Output
FSB Clock
Power/Other
NOTES:See next page
30
Type
Synchronous to
BPRI#, DEFER#, PREQ#
BCLK[1:0]
Synchronous to ADS#, BNR#, BPM[3:0]#
BCLK[1:0] HIT#, HITM#, LOCK#, PRDY#
REQ[4:0]#, A[16:3]# ADSTB[0]#
A[35:17]#
Synchronous to
D[15:0]#, DINV0#
assoc. strobe
D[31:16]#, DINV1#
D[47:32]#, DINV2#
D[63:48]#, DINV3#
Synchronous to
ADSTB[1:0]#, DSTBP[3:0]#, DSTBN[3:0]#
BCLK[1:0]
A20M#, DPRSTP#, DPSLP#, IGNNE#, INIT#, LINT0/
Asynchronous
INTR, LINT1/NMI, PWRGOOD, SMI#, SLP#, STPCLK#
Asynchronous FERR#, IERR#, THERMTRIP#
Asynchronous PROCHOT#
Asynchronous PSI#, VID[6:0], BSEL[2:0]
Synchronous to TCK TCK, TDI, TMS, TRST#
Synchronous to TCK TDO
Clock BCLK[1:0]
COMP[3:0], DBR#
THERMDA, THERMDC, V
V , V
SS
Electrical Specifications
1
Signals
5
, RESET#, RS[2:0]#, TRDY#
3
, BR0#, DBSY#, DRDY#,
3
, DPWR#
Signals Associated Strobe
ADSTB[1]#
DSTBP0#, DSTBN0#
DSTBP1#, DSTBN1#
DSTBP2#, DSTBN2#
DSTBP3#, DSTBN3#
4
2
, GTLREF, RSVD, TEST2, TEST1,
, V
CC CCA
SS_SENSE
, V , V ,
CCP CC_SENSE
Datasheet