Intel P8700 - Core 2 Duo Processor Datasheet page 74

Package Mechanical Specifications and Pin Information
Table 17.
Pin # Pin Name
AE13
AE14
AE15
AE16
AE17
AE18
AE19
AE20
AE21 D[58]#
AE22 D[55]#
AE23
AE24 D[48]#
DSTBN[3]
AE25
AE26
AF1
AF2
AF3
AF4
AF5
AF6
VCCSENS
AF7
AF8
AF9
AF10
AF11
AF12
AF13
AF14
AF15
AF16
AF17
AF18
AF19
AF20
AF21
Datasheet
Pin # Listing
Signal Buffer
Type
VCC Power/Other
VSS Power/Other
VCC Power/Other
VSS Power/Other
VCC Power/Other
VCC Power/Other
VSS Power/Other
VCC Power/Other
Source Synch
Source Synch
VSS Power/Other
Source Synch
Source Synch
#
VSS Power/Other
TEST5 Test
VSS Power/Other
VID[5] CMOS
VID[3] CMOS
VID[1] CMOS
VSS Power/Other
Power/Other
E
VSS Power/Other
VCC Power/Other
VCC Power/Other
VSS Power/Other
VCC Power/Other
VSS Power/Other
VCC Power/Other
VCC Power/Other
VSS Power/Other
VCC Power/Other
VCC Power/Other
VSS Power/Other
VCC Power/Other
VSS Power/Other
Table 17.
Directi
Pin # Pin Name
on
AF22 D[62]#
AF23 D[56]#
DSTBP[3]
AF24
AF25 VSS
AF26 TEST4
B2 RSVD
Input/
B3 INIT#
Output
B4 LINT1
Input/
B5 DPSLP#
Output
B6 VSS
B7 VCC
Input/
Output B8 VSS
Input/ B9 VCC
Output
B10 VCC
B11 VSS
B12 VCC
B13 VSS
Output
B14 VCC
Output
B15 VCC
Output
B16 VSS
B17 VCC
B18 VCC
B19 VSS
B20 VCC
B21 VSS
B22 BSEL[0]
B23 BSEL[1]
B24 VSS
B25 THRMDC
B26 VCCA
C1 RESET#
C2 VSS
C3 TEST7
C4 IGNNE#
C5 VSS
C6 LINT0
THERMTRI
C7
Pin # Listing
Signal Buffer Directi
Type
Input/
Source Synch
Output
Input/
Source Synch
Output
Input/
Source Synch
# Output
Power/Other
Test
Reserved
CMOS
CMOS
CMOS
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
CMOS Output
CMOS Output
Power/Other
Power/Other
Power/Other
Common Clock
Power/Other
Test
CMOS
Power/Other
CMOS
Open Drain Output
P#
on
Input
Input
Input
Input
Input
Input
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