Interface Registers; I/O Registers; Table 4.3 I/O Port Functions And Mapping - Fujitsu MCM3064AP Product Manual

Host Interface

4.3 Interface Registers

4.3.1 I/O registers

This section provides the I/O register functions and mapping. Definitions of each
register vary depending on which ATA or ATAPI commands are used.
Address signal
CS0- CS1- DA2
N N x
N A 0
N A 1
N A 1
N A 1
A N 0
A N 0
A N 0
A N 0
A N 1
A N 1
A N 1
A N 1
A A x
The letter A indicates that the bit is asserted, N indicates that the bit is negated,
and X indicates that the bit is ignored.
C156-E227-01EN

Table 4.3 I/O port functions and mapping

DA1 DA0 READ (DIOR-)
x x High impedance state
x x High impedance state
0 x High impedance state
1 0 Alternate Status
1 1 Drive Address
0 0
0 1
1 0
ATAPI Interrupt Reason
1 1
0 0
0 1
1 0
1 1 ATAPI Status
x x
Function
Control block register
Command block register
Data
Error
Sector Count (ATA)
(ATAPI)
Sector Number
Cylinder Low (ATA)
ATAPI Byte Count (bits 0-7) (ATAPI)
Cylinder High (ATA)
ATAPI Byte Count (bits8-15) (ATAPI)
Device/Head (ATA)
ATAPI Block Device Select (ATAPI)
Ineffective
WRITE (DIOW-)
Ineffective
Ineffective
Ineffective
Device Control
Ineffective
ATA Features (ATA)
ATAPI Features (ATAPI)
Ineffective
ATA Command
Ineffective
4-6