Agilent Technologies E1463A User's Manual And Scpi Programming Manual page 66

32-channel, 5 amp, form c switch scpi programming guide
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Automatically Set at
Power On Conditions
Automatically Set by
Parser
Set by *OPC
Related Commands
are *OPC? and *WAI
Scan Complete
66 E1463A Command Reference
Output Queue
Standard Event Status Register
*ESR?
Power On
0
User Request
1
Command Error
2
Execution Error
3
Device Dependent Error
4
Query Error
5
Request Control
6
Operation Complete
7
EV
OPERation Status Register
STATus:OPERation:CONDition?
STATus:OPERation:EVENt?
STATus:OPERation:ENABle
STATus:OPERation:ENABle?
STATus:PRESet
0
<1>
1
<2>
2
<4>
3
<8>
4
<16>
5
<32>
6
<64>
7
<128>
8
<256>
9
<512>
10
<1024>
11
<2048>
12
<4096>
13
<8192>
14
<16384>
15
<32768>
C
EV
EN
Figure 3-1. E1463A Status System Register Diagram
*ESE <unmask>
*ESE?
<1>
<2>
<4>
"OR"
<8>
+
<16>
<32>
<64>
Summary
<128>
Bit
MAV
EN
ESB
RQS
OPR
Summary
Bit
"OR"
+
*ESE 61 unmasks standard event register bits 0,
*SRE 128 unmasks the OPR bit (operation) in
STAT:QUES:ENAB 256 unmasks the "Scan Complete"
QUE = Questionable Data
MAV = Message Available
ESB = Standard Event
RQS = Request Service
OPR = Operation Status
C = Condition Register
EV = Event Register
EN = Enable Register
SRQ = Interface Bus
Status Byte Register
*STB?
SPOLL
*SRE <unmask>
*SRE?
0
<1>
1
<2>
2
<4>
"OR"
3
<8>
+
4
<16>
5
<32>
6
7
<128>
Status
EN
Byte
SRQ
Summary Bit
unmask examples:
unmask
Register
decimal
bit
weight
Operation Complete
7
<128>
2, 3, 4 and 5 (*ESE 128 only unmasks bit 7).
the status byte register. This is effective
only if the STAT:OPER:ENAB 256 command
is executed.
bit.
NOTE:
Service Request
System
Controller
Interface Bus
SRQ Line
SRQ
Other
Instrument
SRQ
Other
Instrument
"OR"
+
ESB
Chapter 3

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