Quantispeed™ Architecture Summary - AMD AX1800DMT3C - Athlon XP 1.53 GHz Processor Datasheet

AMD Athlon™ XP Processor Model 6 Data Sheet
1.1 QuantiSpeed™ Architecture Summary
2
Preliminary Information
The AMD Athlon XP processor model 6 is binary-compatible
with existing x86 software and backwards compatible with
applications optimized
technology. Using a data format and Single-Instruction
Multiple-Data (SIMD)
instruction model, the AMD Athlon XP processor model 6 can
produce as many as four, 32-bit, single-precision floating-point
results per clock cycle. The 3DNow! Professional technology
implemented in the AMD Athlon XP processor model 6
includes new
software-directed data movement instructions for optimizing
such applications as digital content creation and streaming
video for the internet, as well as new instructions for Digital
Signal Processing (DSP)/communications applications.
The following features
processor model 6 QuantiSpeed architecture:
An advanced nine-issue, superpipelined, superscalar x86
processor microarchitecture
Instructions Per Cycle (IPC) and high clock frequencies
Fully pipelined floating-point unit that executes all x87
(floating-point),
Hardware data pre-fetch that increases and optimizes
performance on high-end software applications utilizing
high-bandwidth system capabilities
Advanced two-level Translation Look-aside Buffer (TLB)
structures for both enhanced data and instruction address
translation. The AMD Athlon XP processor model 6 with
QuantiSpeed
optimizations: the L1 DTLB increases from 32 to 40 entries,
the L2 ITLB and L2 DTLB both use exclusive architecture,
and the TLB entries can be speculatively loaded.
The AMD Athlon XP processor model 6 delivers excellent
system performance in a cost-effective, industry-standard form
factor. The AMD Athlon processor model 6 is compatible with
motherboards based on Socket A.
Figure 1 on page 3 shows a typical AMD Athlon processor
system block diagram.
Overview
for MMX™,
operations
integer multimedia
summarize
designed
MMX, SSE and 3DNow! instructions
architecture incorporates
24309E—March 2002
SSE, and 3DNow!
based on the MMX
instructions
the AMD Athlon XP
for increased
three
Chapter 1
and
TLB