Electrical Data; Conventions; Interface Signal Groupings; Table 2. Interface Signal Groupings - AMD AX1800DMT3C - Athlon XP 1.53 GHz Processor Datasheet

Amd athlon xp processor model 6 data sheet
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24309E—March 2002
7

Electrical Data

7.1

Conventions

7.2

Interface Signal Groupings

Table 2.
Interface Signal Groupings
Signal Group
Power
VID[4:0], VCCA, VCC_CORE, COREFB, COREFB#
Frequency
FID[3:0]
SYSCLK, SYSCLK# (Tied to CLKIN/CLKIN# and RSTCLK/RSTCLK#),
System Clocks
PLLBYPASSCLK#, PLLBYPASSCLK
SADDIN[14:2]#, SADDOUT[14:2]#, SADDINCLK#, SADDOUTCLK#,
AMD Athlon™
SFILLVAL#, SDATAINVAL#, SDATAOUTVAL#, SDATA[63:0]#,
System Bus
SDATAINCLK[3:0]#, SDATAOUTCLK[3:0]#, CLKFWDRST, PROCRDY,
CONNECT
Chapter 7
Preliminary Information
The conventions used in this chapter are as follows:
Current specified as being sourced by the processor is
negative.
Current specified as being sunk by the processor is positive.
The electrical data in this chapter is presented separately for
each signal group.
Table 2 defines each group and the signals contained in each
group.
Signals
Electrical Data
AMD Athlon™ XP Processor Model 6 Data Sheet
See "Absolute Ratings" on page 30,
"Voltage Identification (VID[4:0])"
on page 26, "VID[4:0] Pins" on page
73, "" on page 27,"VCCA Pin" on
page 73, and "COREFB and
COREFB# Pins" on page 69.
See "Frequency Identification
(FID[3:0])" on page 27 and
"FID[3:0] Pins" on page 70.
See Table 9, "SYSCLK and SYSCLK#
DC Characteristics," on page 32,
Table 10, "SYSCLK and SYSCLK# AC
Characteristics," on page 33,
"SYSCLK and SYSCLK#" on page
73, and "PLL Bypass and Test Pins"
on page 72.
See "AMD Athlon™ System Bus AC
and DC Characteristics" on page 34,
and "CLKFWDRST Pin" on page 68.
Notes
25

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