Glossary - Intel BB5520UR Technical Product Specification

Glossary

Term
ACPI Advanced Configuration and Power Interface
AHCI Advanced Host Controller Interface
AMT Active Management Technology
AP Application Processor
APIC Advanced Programmable Interrupt Control
ARP Address Resolution Protocol
ASIC Application Specific Integrated Circuit
ATS Address Translation Technology
BBS BIOS Boot Specification
BEV Boot Entry Vector
BIOS Basic Input/Output System
BIST Built-in Self Test
BMC Baseboard Management Controller
bpp Bits per pixel
bps bit per second
BSP Boot Strap Processor
Byte 8-bit quantity
CL Controller Link
CLTT Closed-Loop Thermal Throttling
CMOS In terms of this specification, this describes the PC-AT compatible region of battery-backed 128
bytes of memory, which normally resides on the server board.
DCA Direct Cache Access
DDR3 Double Data Rate 3
DHCP Dynamic Host Configuration Protocol
DIMM Dual in-line memory module
DMA Direct Memory Access
DPC Direct Platform Control
DXE Driver eXecution Environment
ECC Error Correction Code
EEPROM Electrically Erasable Programmable Read-Only Memory
EFUP Environment Friendly Usage Period
EHCI Enhanced Host Controller Interface
EIST Enhanced Intel SpeedStep
EMC Electromagnetic Compatibility
EMP Emergency Management Port
EPS External Product Specification
ESI Enterprise South Bridge Interface
EVRD Enterprise Voltage Regulator-Down
FMB Flexible Mother Board
FRB Fault Resilient Boot
FRU Field Replaceable Unit
FW Firmware
FWH Firmware Hub
GB 1024 MB
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Intel® Server Boards S5520HC, S5500HCV, and S5520HCT TPS
Glossary
Definition
®
Technology
Intel order number E39529-013
Revision 1.8