Intel® Server Boards S5520HC, S5500HCV, and S5520HCT TPS
Output
+3.3 V
+5 V
+12 V
+5 VSB
1.
9.4.6
Capacitive Loading
The power supply should be stable and meet all requirements within the following capacitive
loading range.
9.4.7
Ripple/Noise
The maximum allowed ripple/noise output of the power supply is defined in the following table.
This is measured over a bandwidth of 0 Hz to 20 MHz at the power supply output connectors. A
10 μF tantalum capacitor in parallel with a 0.1 μF ceramic capacitor are placed at the point of
measurement.
+3.3V
50 mVp-p
9.4.8
Timing Requirements
The following are the timing requirements for the power supply operation. The output voltages
must rise from 10% to within regulation limits (T
rise from 1.0 ms to 25 ms. +3.3 V, +5 V, and +12 V output voltages should start to rise
approximately at the same time. All outputs must rise monotonically. Each output voltage should
reach regulation within 50 ms (T
output voltage should fall out of regulation within 400 msec (T
The following tables and diagrams show the timing requirements for the power supply being
turned on and off via the AC input with PSON held low, and the PSON signal with the AC input
applied.
Revision 1.8
Table 76. Transient Load Requirements
Δ Step Load Size 1
7.0 A
7.0 A
25 A
0.5 A
Step loads on each 12 V output may happen simultaneously.
Table 77. Capacitive Loading Conditions
Output
+3.3V
+5V
+12V1, +12V2, +12V3, +12V4
-12V
+5VSB
Table 78. Ripple and Noise
+5V
+12V1, +12V2, +12V3, +12V4
50 mVp-p
) of each other during turn on of the power supply. Each
vout_on
Intel order number E39529-013
Load Slew Rate
0.25A/μsec
0.25A/μsec
0.25A/μsec
0.25A/μsec
Minimum
Maximum
250
6800
400
4700
500 each
11,000
1
350
20
350
120 mVp-p
) within 5 ms to 70 ms. 5 VSB is allowed to
vout_rise
vout_off
Design and Environmental Specifications
Test Capacitive Load
4700μF
1000μF
4700μF
20μF
Units
μF
μF
μF
μF
μF
-12V
+5 VSB
120 mVp-p
50 mVp-p
) of each other during turn off.
133