Port Register Test; Central Memory Test - Dell PowerVault 50F Installation And Troubleshooting Manual

5-6 Installation and Troubleshooting Guide

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Pressing <Enter> while the Port Register Test window is selected displays a
reminder to take the switch offline if it is not offline. If the message is displayed, take
the switch offline.
Pressing <Enter> starts the test, which checks the switch's ASIC registers. The ports
tested are ports 0 through 15.
If the test is successful, the window displays
An error message would look similar to the following example:
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The centralMemoryTest verifies that the central memory in each Loom ASIC is func-
tioning correctly by checking the following:
The built-in-self-repair (BISR) circuit in each loom chip does not report failure to
repair bad cells.
The data cells can be uniquely written and read correctly (data write/read test).
The data in any ASIC can be read from any other ASIC (loom connection test).
Bad parity can be detected and flagged in the error register and interrupt posted
(buffer number error test).
Chip number error can be detected and flagged in the error register and interrupt
posted (chip number error test).
Pressing <Enter> while Central Memory Test is selected displays a reminder to take
the switch offline, if it is not offline. If the message is displayed, take the switch
offline.
If the switch passes the test,
An error message would look similar to the following example:
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The cmiTest verifies that control messages can be correctly sent from any ASIC to
any ASIC. It also tests that the checksum check is OK. The switch must be offline.
An error message would look similar to the following example:
is displayed.
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