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A E2 Design Changes
The AM263x Control Card had various design changes for the E2 revision of the board. The changes are listed
below:
1. Removal of pull up resistors for QSPI flash D2 and D3 signals.
a. The pull up resistors on the data lines D2 and D3 are redundant with the on-die resistors of the QSPI
flash itself.
2. Fixed netlist error and rerouted I2C2_SDA and I2C2_SCL for proper operation.
a. The E1 revision of the Control Card had the I2C2_SCL signal tied to ball B7 and I2C2_SDA tied to C7.
The correct routing of the signals is implemented in the E2 Control Card with I2C2_SDA connected to B7
and I2C2_SCL connected to C7.
Signal
I2C2_SDA
I2C2_SCL
3. Ethernet PHY default mode changed to enhanced mode from basic mode.
a. The Ethernet PHY (DP83826ERHBT) in E1 had a default mode of basic due to a pull down resistor on
the MODESELECT pin of the PHY. E2 replaced the pull down with a pull up resistor so that the default
mode would be enhanced mode. Enhanced mode allows for the PHY to support real time Ethernet
applications.
4. Add on-board LIN PHY (TLIN2029-Q1).
a. In order to support the LIN PHY, a 1:2 mux (U70) was added so that the LIN1_RXD and LIN1_TXD
would be able to interface with the PHY without losing the signal pathing for UART1_RXD and
UART1_TXD.
b. Two additional header were added to support the LIN PHY's voltage (J33) and output (J32)
Select Line
LOW
HIGH
SPRUJ09C – MARCH 2022 – REVISED FEBRUARY 2023
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Table A-1. I2C2 Signal Routing
E1 Pin Routing
C7
B7
Table A-2. LIN MUX Selection Table
Condition
LIN Selected
HSEC UART Selected
Figure A-1. LIN PHY
Copyright © 2023 Texas Instruments Incorporated
E2 Design Changes
E2 Pin Routing
B7
C7
Function
A->B1 port
A->B2 port
AM263x Control Card Hardware User's Guide
53
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