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Board Setup
Table 3-3
lists the push buttons that are placed on the top side of the AM263x control card board.
Push Button
SW1
SW2
SW4
3.3 Boot Mode Selection
The bootmode for the AM263x is selected by a DIP switch (SW3) or the test automation header. The test
automation header uses an I2C IO expansion buffer to drive the bootmode when PORz is toggled. The
supported boot modes are as shown in
Boot Mode/Peripheral
QSPI (4S) - Quad Read Mode
UART
QSPI (1S) - Single Read Mode
QSPI (4S) - Quad Read UART
Fallback Mode
QSPI (1S) - Single Read UART
Fallback Mode
DevBoot
14
AM263x Control Card Hardware User's Guide
Table 3-3. Control Card Push Buttons
Signal
INTn
PORz
RESETn
Table
3-4.
Table 3-4. Supported Boot Modes
Boot Media/Host
Notes
QSPI Flash
Download and boot SBL from QSPI flash in quad read mode. Attempt
Primary SBL, followed by Secondary SBL if primary loading fails.
External Host
Download and boot SBL from UART. Device is expected to get SBL
from UART. Device supports the XMODEM protocol for download over
UART.
QSPI Flash
Download and boot SBL from QSPI flash in single read mode. Attempt
Primary SBL,followed by Secondary SBL if primary loading fails.
QSPI Flash / External Host Download and boot SBL from QSPI flash in quad read mode. Attempt
Primary SBL, followed by Secondary SBL if primary loading fails. If
Secondary SBL also fails then boot from external host via UART
interface.
QSPI Flash / External Host Download and boot SBL from QSPI flash in single read mode. Attempt
Primary SBL, followed by Secondary SBL if primary loading fails. If
Secondary SBL also fails then boot from external host via UART
interface.
N/A
No SBL. Used for development purposes only.
Figure 3-7. SW3 Switch Positions
Copyright © 2023 Texas Instruments Incorporated
Function
User Interrupt signal
SoC PORz reset input
SoC warm reset input
SPRUJ09C – MARCH 2022 – REVISED FEBRUARY 2023
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