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Hardware Description
Pin
Package Signal Name
#
77
SPI1_D1
SPI1_D1/UART5_RXD/XBAROUT4/FSIRX0_DATA1/GPIO18
79
SPI1_CLK
SPI1_CLK/UART4_RXD/LIN4_RXD/XBAROUT2/FSIRX0_CLK/GPIO16
81
SPI1_CS0
SPI1_CS0/UART4_TXD/LIN4_TXD/XBAROUT1/GPIO15
83
GND
GND
85
I2C1_SDA
I2C1_SDA/SPI3_CLK/XBAROUT8/GPIO24
87
I2C1_SCL
I2C1_SCL/SPI3_CS0/XBAROUT7/GPIO23
89
EPWM21_A
PR0_MDIO0_MDIO/EPWM21_A/GPMC0_CSn2/GPIO85
91
SDFM0_D0
SDFM0_D0/PR0_ECAP0_APWM_OUT/GPIO123
93
EQEP2_B
I2C0_SCL/GPIO135/EQEP2_B/SDFM1_CLK3
95
EQEP2_STROBE
MCAN2_TX/UART1_RTSn/GPIO136/EQEP2_STROBE/SDFM1_D2
97
GND
GND
99
SDFM0_D1
SDFM0_D1/PR0_PRU1_GPIO17/UART5_CTSn/
PR0_IEP0_EDIO_DATA_IN_OUT30/GPIO125
101 SDFM0_CLK1
SDFM0_CLK1/PR0_PRU1_GPIO7/CPTS0_TS_SYNC/UART5_RTSn/
PR0_IEP0_EDC_SYNC_OUT1/I2C3_SDA/GPIO124
103 SDFM0_D2
SDFM0_D2/UART5_RXD/GPIO127
105 SDFM0_CLK2
SDFM0_CLK2/UART5_TXD/I2C3_SCL/GPMC0_ADVn_ALE/GPIO126/
SDFM0_CLK2
107 SDFM0_D3
SDFM0_D3/MCAN3_RX/GPIO129
109 SDFM0_CLK3
SDFM0_CLK3/MCAN3_TX/UART5_RXD/GPIO128
111 GND
GND
113 NC
NC
115 NC
NC
117 NC
NC
119 NC
NC
121 ICSS_MII0_CRS
PR0_PRU0_GPO10/RMII2_CRS_DV/PR0_UART0_RTSn/MII2_CRS/EPWM23_A/
GPMC0_WAIT0/GPIO89
123 ICSS_MII0_RXCLK
PR0_PRU0_GPO6/RMII2_REF_CLK/RGMII2_RXC/MII2_RXCLK/EPWM24_A/
GPMC0_CSn1/GPIO91
125 ICSS_MII0_RXD0
PR0_PRU0_GPO0/RMII2_RXD0/RGMII2_RD0/MII2_RXD0/EPWM25_A/
GPMC0_A1/GPIO93
127 ICSS_MII0_RXD2
PR0_PRU0_GPO2/RGMII2_RD2/MII2_RXD2/EPWM26_A/GPMC0_A3/GPIO95
129 ICSS_MII0_TXCLK
PR0_PRU0_GPO16/RGMII2_TXC/MII2_TXCLK/EPWM27_A/GPMC0_A5/GPIO97
131 ICSS_MII0_TXD0
PR0_PRU0_GPO11/RMII2_TXD0/RGMII2_TD0/MII2_TXD0/EPWM28_A/
GPMC0_A7/GPIO99
133 ICSS_MII0_TXD2
PR0_PRU0_GPO14/RGMII2_TD3/MII2_TXD3/EPWM29_B/GPMC0_A10/
GPIO102
135 GND
GND
137 ICSS_MII1_RXER
PR0_PRU1_GPO5/TRC_DATA0/EPWM30_A/GPMC0_OEn_REn/GPIO103
139 ICSS_MII1_CRS
PR0_PRU1_GPO10/PR0_UART0_TXD/TRC_DATA2/EPWM31_A/GPMC0_BE1n/
GPIO105
50
AM263x Control Card Hardware User's Guide
Table 4-24. E2 HSEC Pinout (continued)
Muxed Signal Options
Copyright © 2023 Texas Instruments Incorporated
Muxed Signal Options
LIN1_TXD/UART1_TXD/SPI2_CLK/XBAROUT6/GPIO20
MCAN0_RX/SPI4_CS0/GPIO7
MCAN0_TX/SPI4_CLK/GPIO8
EPWM11_A/UART2_CTSn/GPMC0_CLKLB/GPIO65
PR0_MDIO0_MDC/EPWM21_B/GPMC0_CSn3/GPIO86
I2C0_SDA/GPIO134/EQEP2_A/SDFM1_CLK2
MCAN2_RX/UART2_RTSn/GPIO137/EQEP2_INDEX/SDFM1_D3
EQEP0_A/UART4_RTSn/SPI4_CLK/GPIO130/SDFM1_CLK0
EQEP0_B/UART4_CTSn/SPI4_CS0/GPIO131/SDFM1_D0
EQEP0_STROBE/UART4_TXD/LIN4_TXD/SPI4_D0/GPIO132/SDFM1_CLK1
EQEP0_INDEX/UART4_RXD/LIN4_RXD/SPI4_D1/GPIO133/SDFM1_D1
PR0_PRU0_GPO5/RMII2_RX_ER/MII2_RX_ER/EPWM22_A/GPMC0_DIR/
PR0_PRU0_GPO9/PR0_UART0_CTSn/MII2_COL/EPWM22_B/GPMC0_CLK/
PR0_PRU0_GPO8/EPWM23_B/GPMC0_WPn/GPIO90
PR0_PRU0_GPO4/RGMII2_RX_CTL/MII2_RXDV/EPWM24_B/GPMC0_A0/
PR0_PRU0_GPO1/RMII2_RXD1/RGMII2_RD1/MII2_RXD1/EPWM25_B/
PR0_PRU0_GPO3/RGMII2_RD3/MII2_RXD3/EPWM26_B/GPMC0_A4/GPIO96
PR0_PRU0_GPO15/RMII2_TX_EN/RGMII2_TX_CTL/MII2_TX_EN/EPWM27_B/
PR0_PRU0_GPO12/RMII2_TXD1/RGMII2_TD1/MII2_TXD1/EPWM28_B/
PR0_PRU0_GPO14/RGMII2_TD3/MII2_TXD3/EPWM29_B/GPMC0_A10/
PR0_PRU1_GPO9/PR0_UART0_RXD/TRC_DATA1/EPWM30_B/
GPMC0_BE0n_CLE/GPIO104
PR0_PRU1_GPO8/TRC_DATA3/EPWM31_B/GPMC0_WEn/GPIO106
Signal Package Name Pin
#
UART1_TXD 78
MCAN0_RX 80
MCAN0_TX 82
HSEC_5V0
HSEC_5V0 84
GPMC0_CLKB 86
NC
NC 88
EPWM21_B 90
EQEP2_A 92
EQEP2_INDEX 94
NC
NC 96
HSEC_5V0
HSEC_5V0 98
EQEP0_B 100
EQEP0_A 102
EQEP0_STROBE 104
EQEP0_INDEX 106
MII0_RXER 108
GPIO87
MII0_CO 110
GPIO88
HSEC_5V0
HSEC_5V0 112
NC
NC 114
NC
NC 116
HSEC_5V0
HSEC_5V0 118
PORz
PORz 120
ICSS_MII0_RXLINK 122
ICSS_MII0_RXDV 124
GPIO92
ICSS_MII0_RXD1 126
GPMC0_A2/GPIO94
ICSS_MII0_RXD3 128
ICSS_MII0_TXEN 130
GPMC0_A6/GPIO98
ICSS_MII0_TXD1 132
GPMC0_A8/GPIO100
ICSS_MII0_TXD3 134
GPIO102
NC
NC 136
ICSS_MII1_COL 138
ICSS_MII1_RXLINK 140
SPRUJ09C – MARCH 2022 – REVISED FEBRUARY 2023
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