Epson S1D10605 Series Manual page 14

S1D10605 Series
System Bus Connection Terminals
Pin Name I/O
D7 to D0 I/O
(SI)
(SCL)
A0 I
RES I
CS1 I
CS2
RD I
(E)
WR I
(R/W)
C86 I
P/S I
CLS I
12
This is an 8-bit bi-directional data bus that connects to an 8-bit or 16-bit
standard MPU data bus.
When the serial interface is selected (P/S = LOW), then D7 serves as the
serial data input terminal (SI) and D6 serves as the serial clock input
terminal (SCL). At this time, D0 to D5 are set to high impedance.
When the chip select is inactive, D0 to D7 are set to high impedance.
This is connect to the least significant bit of the normal MPU address bus,
and it determines whether the data bits are data or a command.
A0 = HIGH: Indicates that D0 to D7 are display data.
A0 = LOW: Indicates that D0 to D7 are control data.
When RES is set to LOW, the settings are initialized.
The reset operation is performed by the RES signal level.
This is the chip select signal. When CS1 = LOW and CS2 = HIGH, then the
chip select becomes active, and data/command I/O is enabled.
• When connected to an 8080 MPU, this is active LOW.
This pin is connected to the RD signal of the 8080 MPU, and the
S1D10605 series data bus is in an output status when this signal is LOW.
• When connected to a 6800 Series MPU, this is active HIGH.
This is the 6800 Series MPU enable clock input terminal.
• When connected to an 8080 MPU, this is active LOW.
This terminal connects to the 8080 MPU WR signal. The signals on
the data bus are latched at the rising edge of the WR signal.
• When connected to a 6800 Series MPU:
This is the read/write control signal input terminal.
When R/W = HIGH: Read.
When R/W = LOW: Write.
This is the MPU interface switch terminal.
C86 = HIGH: 6800 Series MPU interface.
C86 = LOW: 8080 MPU interface.
This is the parallel data input/serial data input switch terminal.
P/S = HIGH: Parallel data input.
P/S = LOW: Serial data input.
The following applies depending on the P/S status:
P/S Data/Command
HIGH A0
LOW A0
When P/S = LOW, D0 to D5 are HZ. D0 to D5 may be HIGH, LOW or
Open.
RD (E) and WR (P/W) are fixed to either HIGH or LOW.
With serial data input, RAM display data reading is not supported.
Terminal to select whether or enable or disable the display clock internal
oscillator circuit.
CLS = HIGH: Internal oscillator circuit is enabled
CLS = LOW: Internal oscillator circuit is disabled (requires external input)
When CLS = LOW, input the display clock through the CL terminal.
When using the S1D10605 Series as a master or slave, set respective
CLS pins at the same level.
Display clock
Built-in oscillator circuit used
External input
Function
Data Read/Write Serial Clock
D0 to D7 RD, WR
SI (D7) Write only
Master Slave
HIGH HIGH
LOW LOW
EPSON
SCL (D6)
No. of
Pins
8
1
1
2
1
1
1
1
1
Rev.2.1