Table of Contents
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L
Layout, keyboard, D-5
Location, choosing, 1-2
Locking,
boards, 2-18
cover, 3-2, 4-7
Lock-up problems, C-5-8
Low-level formatting, B-1-12
M
Main system board,
jumper, 5-2
map, 5-2
specifications, D-l
Map,
main system board, 5-2
processor boards, 5-3
system memory, D-7
Marketing locations, international,
Intro-5
Mass storage bays, Intro-l, 6-l-3,
D-3
Master drive, 6-4-5
Math coprocessor,
configuring, 2-12
diagnostic test, A-l, A-7, C-18
installing, l-3,5-7-10
problems, C-18
removing, 5-10
socket(s), 5-3, 5-9-10, D-3
specification, 5-9, D-3
Maximum wet bulb, D-5
Memory,
address blocks, 2-14, D-7
banks, 5-11-12
base, 2-11, D-7
cache, see Cache memory
CMOS, see CMOS
configuration, 2-11, 5-11-13
configuration RAM, Intro-1, D-1
diagnostic test, A-1, A-7
extended, 2-11, 5-11-15, D-7
map, D-7
Memory,
modules, see SIMMs
non-cache areas, 2-14
problems, C-l7
remap control, 2-11
shadow RAM, Intro-2, D-l, D-7
SIMMs, see SIMMs
specifications, 5-l-13, D-l, D-7
Microprocessor, 5-3, D-3
Modeling mode, see Non-target
modeling mode
Modes, see Configuration modes
Monitor,
connecting, l-3, l-5
interface, 1-5
problems, C-11-12
Mounting frames, hard disk, 6-3
Mouse,
configuring, 2-4-5
connecting, l-3,1-5
driver, loading, 2-4-5
icon, l-5
interface, l-5, D-l
port, Intro-l, 5-2
port specifications, D-l
problems, C-18
using during configuration, 2-4-5
MS-DOS, 2-21
N
Network card, 2-13
Network server, Intro-l, 3-3-6
Network server mode, Intro-2,
2-13, 3-336
Non-cache areas, 2-14
Non-destructive surface analysis,
B-3, B-11-12
Non-target modeling mode,
2-21-22
Num lock mode, initial, 2-13
Numeric coprocessor, see
Math coprocessor
Index
5
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