Pll Filter Recommendations; Processor Pll Filter - Intel Pentium III Processor 512K Design Manual

® ®
LV Intel Pentium III Processor 512K Dual Processor Platform
5.5.1.2 AGTL V
Three 0.1-µF capacitors in 0603 packages should be placed within 500 mils of the V
should be connected between V
ground. If this circuit is far from the processor, add a 0.1-µF capacitor for decoupling.
5.5.2

PLL Filter Recommendations

It is highly critical that phase lock loop power delivery to the processor meets Intel's requirements.
A low pass filter is required for power delivery to pins PLL1 and PLL2. This serves as an isolated,
decoupled power source for the internal PLL.
5.5.2.1 Topology
The LV Intel Pentium
which are analog and require a quiet power supply to minimize jitter. PLL1 should have a 4.7-µH
inductor connected in series to V
100-µF) to PLL1. See Figure 21.
Figure 21. Processor PLL Filter
Other routing requirements:
•
The capacitor (C) should be close to the PLL1 and PLL2 pins, < 0.1Ω per route.
•
The PLL2 route should be parallel and next to PLL1 route (minimize loop area).
•
The inductor (L) should be close to C; any routing resistance should be inserted between V
and L.
36
Decoupling Design
REF
and V
TT REF
III processor 512K has internal phase lock loop (PLL) clock generators,
, and PLL2 should be connected through a capacitor (22- to
TT
PLL1
Tualatin
Processor
PLL2
, and one should be connected between V
4.7 uH
L
22 -100 uF
C
pins. Two
REF
and
REF
V
Vcc
TT
CORE
TT
Design Guide