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K14-I
C connector
2
The type of this connector is "Header 4x1". The pinout is following:
K12-FPGA JTAG port
This connector allows testing of FPGA and its user-created configuration. User
can use Xilinx standard cables for this purpose.
K13-FPGA programming connector
This connector allows reprogramming the FPGA with an user-created
configuration. User can use Xilinx standard cable for this purpose. For
description of how to do that, see the chapter "FPGA programming"
K16-Audio Out connector
GND
AUD
This connector allows connecting an external speaker.
S W I T C H E S
System control DIP switches
These switches are used for choosing the initial mode of the CPU after the
"hard" reset (caused by power-on or the Main board reset button).
1: UMD0
2: UMD1
3: UMD2
4: FLASH8/16
5: ADR/IO
6: SWAP
7: UART0/1
8: UKEY
1:UMD0, 2:UMD1, 3:UMD2 - The setting of these switches affects the mode
of the processor after reset – when the Mainboard's reset button is pushed or
power applied to the board, the state of these switches is copied to the MD0-
MD2 pins of the CPU. When a switch is ON, the appropriate signal will be
pulled to log. '0'. The description of the modes is in the following table:
1: VCC
2: SDA
3: SCL
4: GND
ON
1
2
3
4
5
6
7
53
53
53
53
8
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