Open Hw Architecture - Fujitsu DevKit16 User Manual

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provides large RAM and FLASH with fast download and programming
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provides additional peripheral devices – PC keyboard interface, EEPROM, LED
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Display, I C
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Optional low level HW debug support (breakpoints, trace)
O P E N H W A R C H I T E C T U R E
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Two buses for 16LX family members are defined: Interface Bus and Device Bus
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Interface Bus provides compatibility for Main board
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Device bus is located on CPU board and provides compatibility with use of CPU
peripherals
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This allows to provide low cost CPU personality boards, which are compatible
with the Interface and Device Bus and reflects different MCU pin layout
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Expansion buses/connectors: User Prototype connector with user chip select and
bus signals, FPGA User Programmable Pins (40), CPU AD converter connector
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Upgradable FPGA content
Warning: this kit must only be used for test applications in a
laboratory environment.
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