Revision History
5
Revision History
DATE
REV
19 APR 05
*
17 AUG 05
A
MARCH 07
B
6
Schematics
This chapter contains the DAC5687 EVM schematic diagrams.
26
DAC5687 EVM
PAGE
SECTION
–
–
6
Hardware Configuration
10
Figure 1
11
Figure 2
12
Figure 3
14
Figure 4
16
PLL Port Config
DAC5687 EVM Operational
7
Procedure
DESCRIPTION
Original version
Changed input clock level from 300 mVpp to 1 Vpp.
Updated to reflect new version of DAC5687 SPI software
(V2.3).
Updated to reflect new version of DAC5687 SPI software
(V2.3).
Updated to reflect new initial test setup.
Updated to reflect new version of DAC5687 SPI software
(V2.3).
Updated to reflect new version of DAC5687 SPI software
(V2.3).
Added steps to prepare the DAC5687 EVM for operation.
SLWU017B – APRIL 2005 – Revised March 2007
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