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DAC5687 EVM
User's Guide
March 2007
Wireless Infrastructure Products
SLWU017B

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Summary of Contents for Texas Instruments DAC5687 EVM

  • Page 1 DAC5687 EVM User's Guide March 2007 Wireless Infrastructure Products SLWU017B...
  • Page 2 SLWU017B – APRIL 2005 – Revised March 2007 Submit Documentation Feedback...
  • Page 3: Table Of Contents

    Purpose .................... EVM Basic Functions .................... Power Requirements ..................... Software Installation ..................Hardware Configuration ................DAC5687 EVM Operational Procedure ................ Starting the Serial Interface Program .................. DAC5687 Initial Setup Tests ................ DAC5687 GUI Register Descriptions ....................Physical Description ...................... PCB Layout ......................
  • Page 4 List of Figures ......................Serial Interface GUI ............DAC5687 Setup for X4L Mode and NCO Tone at F ......Spectrum with CLK2 = 500 MHz, X4L Interpolation and NCO Frequency = 343597383 ............DAC5687 Setup for X4 Mode and NCO Tone at F .........................
  • Page 5: Overview

    DAC. The DAC5687 EVM allows the user to program the DAC5687 internal registers with the supplied computer parallel port cable and serial interface software. The interface allows read and write access to all registers that define the operation mode of the DAC5687 device.
  • Page 6: Software Installation

    Hardware Configuration The DAC5687 EVM can be set up in a variety of configurations to accommodate a specific mode of operation. Before starting evaluation, the user should decide on the configuration and make the appropriate connections or changes. The demonstration board comes with the following factory-set configuration: •...
  • Page 7: Dac5687 Evm Operational Procedure

    DAC5687 EVM Operational Procedure DAC5687 EVM Operational Procedure To prepare the DAC5687 EVM for operation, follow these steps: 1. Parallel Port Interface: Connect one end of the supplied serial interface cable to the parallel port of a PC and the other end of the cable to J1 on the EVM and skip steps 2 to 7.
  • Page 8 (advanced)”. Click “Next”. 5. Select "Search for the best driver in these locations" and browse for the folder where the DAC5687 program was installed (the default location is C:\Program Files\Texas Instruments\DAC5687). Once the file path has been selected, click “Next” to proceed.
  • Page 9 DAC5687 EVM Operational Procedure 6. If Windows XP is configured to warn when unsigned (non-WHQL certified) drivers are about to be installed, the following screen is displayed unless installing a Microsoft WHQL certified driver. Click on "Continue Anyway" to continue with the installation. If Windows XP is configured to ignore file signature warnings, no message will appear.
  • Page 10: Starting The Serial Interface Program

    DAC5687 EVM Operational Procedure Starting the Serial Interface Program Power up the EVM. After power up, depress switch S1 to reset the DAC5687. Start the software by running the following executable: C:\Program Files\TI.fdr\DAC5687_SPI\ DAC5687_SPI.exe. If the EVM is powered on with the parallel port connected properly, then the GUI shown in Figure 1 displayed with the default settings read from the device.
  • Page 11: Dac5687 Initial Setup Tests

    DAC5687 EVM Operational Procedure DAC5687 Initial Setup Tests There are several initial tests with the DAC5687 that can be done without any input data. The following setup steps are suggested to familiarize the user with the DAC5687 and EVM software and verify that the DAC5687 is functioning properly.
  • Page 12: Spectrum With Clk2 = 500 Mhz, X4L Interpolation And Nco Frequency = 343597383

    DAC5687 EVM Operational Procedure This tone is being generated by the DAC5687 NCO. With no input data provided to connectors J13 and J14, the Channel A and B data bus inputs will all be zeros, or a full scale negative value in the default offset binary format.
  • Page 13: Dac5687 Gui Register Descriptions

    DAC5687 EVM Operational Procedure Figure 4. DAC5687 Setup for X4 Mode and NCO Tone at F DAC5687 GUI Register Descriptions 2.3.1 Register Controls ⋅ Load Regs: Loads register values from a saved file to the DAC5687 and updates the GUI.
  • Page 14 Sets sif_4pin bit. 4 pin serial interface mode is enabled when on, 3 pin mode when off. The DAC5687 EVM is configured for a 3 pin serial interface. The 4 bit serial interface will not work with the DAC5687 EVM.
  • Page 15 DAC5687 EVM Operational Procedure ⋅ Sync_NCO: When set, the NCO phase accumulator is cleared with a phstr low to high transition. ⋅ Phstr Clk Div Selects the clock used to latch the PHSTR input when restarting the Select: internal clock dividers. When set, the full rate CLK2 signal latches PHSTR.
  • Page 16: Physical Description

    Opens an additional window with help related topics for the software. Physical Description This chapter describes the physical characteristics and PCB layout of the EVM and lists the components used on the module. DAC5687 EVM SLWU017B – APRIL 2005 – Revised March 2007 Submit Documentation Feedback...
  • Page 17: Pcb Layout

    The EVM is constructed on a 4-layer, 4.9-inch x 6.5-inch, 0.055-inch thick PCB using FR-4 material. Figure 5 through Figure 8 show the PCB layout for the EVM. Figure 5. Top Layer 1 SLWU017B – APRIL 2005 – Revised March 2007 DAC5687 EVM Submit Documentation Feedback...
  • Page 18: Layer 2, Ground Plane

    Physical Description Figure 6. Layer 2, Ground Plane DAC5687 EVM SLWU017B – APRIL 2005 – Revised March 2007 Submit Documentation Feedback...
  • Page 19: Layer 3, Power Plane

    Physical Description Figure 7. Layer 3, Power Plane SLWU017B – APRIL 2005 – Revised March 2007 DAC5687 EVM Submit Documentation Feedback...
  • Page 20: Parts List

    Physical Description Figure 8. Bottom Layer Parts List Table 1 lists the parts used in constructing the EVM. DAC5687 EVM SLWU017B – APRIL 2005 – Revised March 2007 Submit Documentation Feedback...
  • Page 21 Physical Description Table 1. DAC5687 EVM Parts List Bill of Material For DAC5687 Value Qty. Part Number Vendor Ref Des Not Installed CAPACITORS 47 uF, tantalum, 10%, 10 V 10TPA47M Sanyo C53-C58 10 uF, 10 V, 10% capacitor GRM42X5R106K10...
  • Page 22: Circuit Description

    DAC5687 converter, the clock source should feature low jitter. Using a clock with a 50% duty cycle gives optimum dynamic performance. Input Data The DAC5687 EVM can accept 1.8-V or 3.3-V CMOS logic level data inputs through the 34-pin headers J13 and J14 per Table 2 Table 3.
  • Page 23: Output Data

    CMOS data bit 15 (MSB) CMOS data bit 7 CMOS data bit 8 Output Data The DAC5687 EVM can be configured to drive a doubly terminated 50-Ω cable or provide unbuffered differential outputs. 4.3.1 Transformer-Coupled Signal Output The factory-set configuration of the demonstration board provides the user with single-ended output signals at SMA connectors J5 and J19.
  • Page 24: Control Inputs

    The DAC5687 device has five discrete inputs to control the operation of the device. 4.4.1 Sleep Mode The DAC5687 EVM provides a means of placing the DAC5687 device into a power-down mode. This mode is activated by placing a jumper between pins 5 and 6 on header J15. 4.4.2 Reset The DAC5687 EVM provides a means of resetting the DAC5687 device.
  • Page 25: Internal Reference Operation

    EXTI/O and connecting EXTLO to +3.3VA (jumper W1 installed between pins 1 and 2). The specified range for external reference voltages must be observed (see the DAC5687 data sheet (SLWS164) for details). SLWU017B – APRIL 2005 – Revised March 2007 DAC5687 EVM Submit Documentation Feedback...
  • Page 26: Revision History

    Updated to reflect new version of DAC5687 SPI software PLL Port Config (V2.3). DAC5687 EVM Operational MARCH 07 Added steps to prepare the DAC5687 EVM for operation. Procedure Schematics This chapter contains the DAC5687 EVM schematic diagrams. DAC5687 EVM SLWU017B – APRIL 2005 – Revised March 2007...
  • Page 27: Important Notices

    +3.3VA IOVDD +3.3VA +3.3VA +3.3VA .1uF .1uF .1uF .1uF .1uF 10uF +1.8VD (2-3) (Note 1) SW-PB (Note 1) IOUTA .1uF .1uF RESET RESET (Sh 2) +1.8VD +1.8VD (Note 1) T4-1-KK81 +3.3VA +3.3VA .1uF 10uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF (Note 1) (Note 1)
  • Page 28 DATA PORT 1 DA15 DA14 DA13 DA12 DA11 DA10 IOVDD (SH 1) DA(0..15) 34PIN_IDC (Note 1) SLEEP (SH 1) SLEEP (Note 1) PHSTR (SH 1) PHSTR TXENABLE (SH 1) TXENABLE QFLAG (SH 1) QFLAG DATA PORT 2 RESET (SH 1, 5) RESET 3 ROW 30 PIN CONNECTOR DB10...
  • Page 29 CLK1 (SH 1) CLK1 CLK1 .01uF CLK1C (SH 1) CLK1C TCM4-1W CLK2 (SH 1) CLK2 CLK2 .01uF CLK2C (SH 1) CLK2C TCM4-1W 12500 TI Boulevard. Dallas, Texas 75243 NOTES: Title: DAC5687 1. PART NOT INSTALLED Engineer: J. SETON DOCUMENTCONTROL # REV: Drawn By: Y.
  • Page 30 +3.3V_SER +3.3V_SER +3.3V_SER .1uF .1uF .1uF SN74HCT14 SN74HCT14 DB25F-RA SN74HC241 SDEN OE1_ SCLK SDIO SDIO (Sh 1) SDIO SCLK (Sh 1) SCLK SDENB (Sh 1) SDENB (Note 1) (Sh 1) 12500 TI Boulevard. Dallas, Texas 75243 Title: DAC5687 Engineer: J. SETON DOCUMENTCONTROL # NOTE 1.
  • Page 31 +3.3VA +3.3VA IOVDD (1-2) +1.8VD + C27 + C28 MBRB2515L 10uF 0.01uF 47 uF 10uF 0.01uF 47 uF BLACK +3.3V_SER +1.8VD + C31 + C30 MBRB2515L 10uF 0.01uF 47 uF 47 uF 10uF 0.01uF BLACK +3.3VA +3.3VPLL (2-3) + C32 10uF 0.01uF 47 uF...
  • Page 32 EVALUATION BOARD/KIT IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards.
  • Page 33 TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products...

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