Edp And Dp Routing Guidelines; Figure 9-2. Dp++ Connection Example; Figure 9-3. Edp And Dp Differential Main Link Topology - Nvidia Jetson Orin NX Design Manual

The following figure shows an example of a DP++ connection.
Figure 9-2. DP++ Connection Example
Jetson
SoC – DP/HDMI
GP05_HDMI_CEC
GP74_HPD0_N
SF_DPAUX01_P
SF_DPAUX01_N
HS_DISP0_HDMI_CK_DP3_P
HS_DISP0_HDMI_CK_DP3_N
HS_DISP0_HDMI_D0_DP2_P
HS_DISP0_HDMI_D0_DP2_N
HS_DISP0_HDMI_D1_DP1_P
HS_DISP0_HDMI_D1_DP1_N
HS_DISP0_HDMI_D2_DP0_P
HS_DISP0_HDMI_D2_DP0_N
9.1.1

eDP and DP Routing Guidelines

The following routing requirements meet the eDP and DP routing guidelines.
Figure 9-3. eDP and DP Differential Main Link Topology
Jetson
SoC
P
DP
Pkg
Driver
N
PRELIMINARY INFORMATION
NVIDIA Jetson Orin NX
VDD_3V3_SYS
BUCK_3V3_PG
HDMI_CEC
94
PI3AUX221ZTAEX
VDD_1V8
VREF1
SN74LVC
1G04Q1
DP1_HPD
HPD1
96
DP1_AUX_N
AUX1_P
98
DP1_AUX_P
AUX1_N
100
0.1uF
DP1_TXD3_N
81
DP1_TXD3_P
83
0.1uF
0.1uF
DP1_TXD2_N
75
DP1_TXD2_P
77
0.1uF
0.1uF
DP1_TXD1_N
69
DP1_TXD1_P
71
0.1uF
0.1uF
DP1_TXD0_N
63
DP1_TXD0_P
65
0.1uF
Common Mode
Chokes & ESD
Load Switch
IN OUT
VDD_3V3_SYS
EN
0.1uF
G
S
VREF2
0Ω
HPD2
220pF 220pF
AUX2B_P
AUX2B_N
0.1uF
AUX2A_P
AUX2A_N
0.1uF
SEL
ESD MG20 40MUTAG
eDP
Conn
Display
VDD_3V3_EDP
D
DP
Conn
.
PWR
20
PWR_RET
19
HPD
18
AUXN
17
GND
16
AUXP
15
CEC_DP
14
MODE
13
LANE_3N
12
GND
11
LANE_3P
10
LANE_2N
9
GND
8
LANE_2P
7
LANE_1N
6
GND
5
LANE_1P
4
LANE_0N
3
GND
2
LANE_0P
1
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