Nvidia Jetson Nano Product Design Manual page 7

Table 1-1. Abbreviations and Definitions ........................................................................2
Table 2-1. Jetson Nano Interfaces .................................................................................4
Table 2-2. Jetson Nano Connector Pinout Matrix ...........................................................5
Table 5-1. Jetson Nano Power and System Pin Descriptions ........................................ 11
Table 6-1. Jetson Nano USB 2.0 Pin Descriptions......................................................... 15
Table 6-2. Jetson Nano USB 3.0 and PCIe Pin Descriptions .......................................... 15
Table 6-3. Jetson Nano USB 3.0 and PCIe Lane Mapping Configurations....................... 16
Table 6-4. USB 2.0 Interface Signal Routing Requirements........................................... 18
Table 6-5. USB 3.0 Interface Signal Routing Requirements........................................... 18
Table 6-6. Tegra USB 2.0 Signal Connections............................................................... 21
Table 6-7. Miscellaneous USB 2.0 Signal Connections.................................................. 22
Table 6-8. Tegra USB 3.0 Signal Connections............................................................... 22
Table 6-9. PCIe Interface Signal Routing Requirements ............................................... 23
Table 6-10. PCIe Signal Connections ............................................................................. 25
Table 6-11. Jetson Nano Gigabit Ethernet Pin Description.............................................. 26
Table 6-12. Ethernet MDI Interface Signal Routing Requirements .................................. 27
Table 6-13. Ethernet Signal Connections ....................................................................... 27
Table 7-1. Jetson Nano Display General Pin Description .............................................. 28
Table 7-2. Jetson Nano DSI Pin Description ................................................................. 29
Table 7-3. MIPI DSI and CSI Interface Signal Routing Requirements ............................. 30
Table 7-4. MIPI DSI Signal Connections ....................................................................... 30
Table 7-5. Jetson Nano eDP and DP Pin Description .................................................... 31
Table 7-6. eDP and DP Main Link Signal Routing Requirements including DP_AUX ....... 33
Table 7-7. eDP Signal Connections .............................................................................. 35
Table 7-8. Jetson Nano HDMI and DP Pin Description .................................................. 36
Table 7-9. DP and HDMI Pin Mapping .......................................................................... 36
Table 7-10. HDMI Interface Signal Routing Requirements .............................................. 38
Table 7-11. HDMI Signal Connections............................................................................ 43
Table 7-12. DP Signal Connections................................................................................ 45
Table 8-1. Jetson Nano CSI Pin Description ................................................................. 46
Table 8-2. Jetson Nano Camera Miscellaneous Pin Description.................................... 47
Table 8-3. CSI Configuration........................................................................................ 48
Table 8-4. MIPI CSI Signal Connections ....................................................................... 50
Table 8-5. Miscellaneous Camera Connections ............................................................ 50
Table 9-1. Jetson Nano SDIO Pin Description............................................................... 51
Table 9-2. SD Card and SDIO Interface Signal Routing Requirements ........................... 52
Table 9-3. SD Card and SDIO Signal Connections ......................................................... 53
NVIDIA Jetso n Nano
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DG-09502-001_v2.1 | vii