Nvidia Jetson Nano Product Design Manual page 42

Parameter
HBR2 (Microstrip, 5x / 7x)
Trace spacing (pair-pair)
Microstrip (HBR/RBR)
Microstrip (HBR2)
Trace spacing Stripline/Microstrip
(Main link to AUX)
Max intra-pair (within pair) skew
Maxinter-pair (pair-pair) skew
Via
Max GND transition via distance
Via Structure
Impedance dip
Recommended via dimension
for impedance control
Topology
GND via
Max # of vias
Max via stub length
AC Cap
Value
Max distance from AC cap
to connector
Voiding
Connector
Voiding
General: See Chapter 15 for guidelines related to Serpentine routing, routing over voids and noise coupling
Notes:
1. For eDP/DP, the spec puts a higher priority on the trace loss characteristic than on the impedance. However, before selecting 85Ω for impedance, it is important
to make sure the selected stack-up, material and trace dimension can achieve the needed low loss characteristic.
2. Longer trace lengths may be possible if the total trace loss is equal to or better than the target. If the loss is greater, the max trace lengths will need to be
reduced.
3. Do not perform length matching within breakout region. Recommend doing trace length matching to <1ps before vias or any discontinuity to minimize common
mode conversion.
4. The average of the differential signals is used for length matching.
NVIDIA Jetso n Nano
Requirement
HBR2 (Stripline) 102 (700)
89 (525) / 102 (600)
Stripline 3x
4x
5x to 7x
3x / 5x
0.15 (1)
150
< 1x
≥97
≥92
Drill/Pad 200/400
Antipad >840
Via pitch ≥880
Y-pattern is recommended
keep symmetry
For in-line via, the distance from a via of one
lane to the adjacent via from another lane >=
1.2 mm center-center.
Place GND via as symmetrically as possible
to data pair vias. Up to four signal vias (2 diff
pairs) can share a single GND return via
PTH vias 2 if all vias are PTH via
Micro vias Not limited if total channel loss meets IL spec
0.4
0.1
RBR/HBR No requirement
HBR2 0.5
No requirement
RBR/HBR
Voiding required
HBR2
No requirement
RBR/HBR
Voiding required
HBR2
Units Notes
dielectric
dielectric
mm (ps) See Note 2
ps See Note 3
diff pair pitch For signals switching reference layers, add symmetrical
GND stitching via near signal vias.
Ω @ 200ps The via dimension is required for HDMI-DP co-layout.
Ω @ 35ps
um
um
um
Y-pattern helps with Xtalk suppression. It can also
reduce the limit of pair-pair distance. Need review
(NEXT/FEXT check) if via placement is not Y-pattern. See
Figure 7-5
See Figure 7-6
GND via is used to maintain a return path, while its Xtalk
suppression is limited.
mm
uF Discrete 0402
in
HBR2: Voiding the plane directly under the pad 3-4 mils
larger than the pad size is recommended.
HBR2: Standard DP connector: Voiding requirement is
stack-up dependent. For typical stack-ups, voiding on the
layer under the connector pad is required to be 5.7 mil
larger than the connector pad.
Display
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