Chapter 5. Power; Table 5-1. Jetson Nano Power And System Pin Descriptions - Nvidia Jetson Nano Product Design Manual

Chapter 5. Power

Power for the module is supplied on the
Nano Data Sheet
!
CAUTION: Jetson Nano is not hot-pluggable. When installing the module, the main power supply
should not be connected. Before removing the module, the main power supply (to
must be disconnected and allowed to discharge below 0.6V.
Table 5-1. Jetson Nano Power and System Pin Descriptions
Pin # Module Pin Name Tegra X1 Signal
251 VDD_IN
↓
260
235 PMIC_BBAT
FORCE_
214 BUTTON_VOL_UP
RECOVERY*
240 SLEEP/WAKE* BUTTON_PWR_ON
233 SHUTDOWN_REQ*
(PMIC EN0 through
237 POWER_EN
converter logic)
239 SYS_RESET* SYS_RESET_IN_N
178 MOD_SLEEP* GPIO_PA6
NVIDIA Jetso n Nano
for supply tolerance and maximum current).
Usage/Description
− Main power – Supplies PMIC and other
regulators
PMIC Battery Back-up. Optionally used to
provide back-up power for the Real-Time-
Clock (RTC). Connects to Lithium Cell or super
− capacitor on Carrier Board. PMIC is source
when charging cap or coin cell. Super cap or
coin cell is source when system is
disconnected from power.
Force Recovery strap pin
Sleep/Wake. Configured as GPIO for optional
use to indicate the system should enter or exit
sleep mode.
Used by the module to request the carrier
− board to shut down. 100kΩ pull-up to VDD_IN
(5V) on the module.
Signal for module on/off: high level on, low
level off. Connects to module PMIC EN0
through converter logic. 100kΩ pulldown on
the module.
Module Reset. Reset to the module when
driven low by the carrier board. Used as
carrier board supply enable when driven high
by the module. when module power
sequence is complete. Used to ensure proper
power on/off sequencing for between module
and carrier board supplies. 4.7kΩ pull-up to
1.8V on the module.
Indicates the module sleep status. Low is in
sleep mode, high is normal operation. This pin
pins and is nominally 5.0V (see the
VDD_IN
Usage on NVIDIA DevKit
Carrier Board
Main DC input
Battery Back-up using
Super-capacitor
Automation header
Automation header
System
System
Automation header
HDMI termination pull-
down FET control disable
Jetson
pins)
VDD_IN
MPIO Pad
Direction Pin Type
Code
Input 5.0V −
−
Bidir 1.65V-5.5V
Input CMOS – 1.8V ST
Input CMOS – 5.0V ST
−
Output Open Drain, 5.0V
−
Input Analog 5.0V
Bidir Open Drain, 1.8V JT_RST
Output CMOS – 1.8V ST
DG-09502-001_v2.1 | 11
Power-on
Reset
−
−
pu
pu
−
−
1
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