Inter-Integrated Circuit; Advisories; Ardy Interrupt Is Not Generated Properly In Non-Repeat Mode If Stop Bit Is Set; Repeated Start Mode Does Not Work - Texas Instruments TMS320VC5509A Manual

Digital signal processor, silicon errata
Table of Contents

Advertisement

TMS320VC5509A Silicon Errata
3.9
Inter-Integrated Circuit (I
Advisory I2C_3
Revision(s) Affected:
Details:
Assembler Notification: None
Workaround:
Advisory I2C_5
Revision(s) Affected:
Details:
Assembler Notification: None
Workaround:
2
C) Advisories

ARDY Interrupt is not Generated Properly in Non-Repeat Mode if STOP Bit is Set

1.0 and 1.1
In non-repeat mode, if the STP bit of ICMDR is set, the master sends the STOP condition and
does not assert ARDY interrupt after sending data. If the STP bit is set, the I
STOP condition and clears the ARDY bit.
If the ARDY interrupt is desired after sending data, start the data transfer without setting the
STP bit. If the STOP bit is not set beforehand, the master will not send the STOP condition
and asserts the ARDY interrupt after sending the data. Set the STP bit when the last ARDY
interrupt arrives (all data sent out).
1.0 and 1.1
Repeated Start Mode does not work on the I
None

Repeated Start Mode Does Not Work

2
C peripheral.
SPRZ200E
2
C sends the
23

Advertisement

Table of Contents
loading

Table of Contents