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Chapter 6
NI-VXI Configuration Utility
Address Space and Requested Memory
Caution
If you install DRAM into the VXI/VME-MXI-2, do not attempt to use the first
4 KB of memory space. This 4 KB space maps to the registers on the VXI/VME-MXI-2
and does not access onboard DRAM. Accessing this region will cause your
VXI/VME-MXI-2 to behave incorrectly.
A16 and A24/A32 Write Posting
PCI-MXI-2 for Linux
The VXI/VME-MXI-2 requires at least 16 KB of address space in A24
space or at least 64 KB in A32 space. Use the Address Space control
to select whether you want to use A24 space or A32 space. Use the
Requested Memory control to set the amount of memory space that the
VXI/VME-MXI-2 will request. You can select up to 8 MB in A24 space
and up to 2 GB in A32 space. The default setting uses the minimum
requirement of 16 KB in A24 space.
These controls are necessary if you change the amount of DRAM installed
on the VXI/VME-MXI-2. The amount of memory you set with the
Requested Memory control should match the amount of DRAM installed
on the VXI/VME-MXI-2. If no DRAM is installed, keep the default setting
of 16 KB. Notice that the smallest valid amount in A32 space is 64 KB.
If you do not want to lose 4 KB of DRAM you can get around this
limitation by setting the Requested Memory control to double the amount
that is installed on the VXI/VME-MXI-2, because the DRAM is aliased
throughout the remainder of the requested memory space. The DRAM
should then be accessed in the upper half of the requested memory space.
The VXI/VME-MXI-2 can increase performance with its capability to post
write cycles from both the MXIbus and the VXI/VMEbus. Write cycles
should be posted only to devices that cannot return a BERR signal, because
the BERR will not be reported to the originating master.
Click on the checkbox control(s) if you want to use either A16 or A24/A32
write posting. By default, both options are disabled.
The A16 write posting control affects only write cycles that map through
the A16 window from the VXI/VMEbus to the MXIbus and vice versa. A16
write cycles in VXI configuration space are never posted regardless of the
setting of this control.
The A24/A32 write posting control affects write cycles that map through
the A24 window and A32 window from the VXI/VMEbus to the MXIbus
and vice-versa. This control also affects write cycles to the
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