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There is a potential problem when opening up a shared memory region to point
Caution
to system RAM. The PCI bus may return a retry on any cycle into system RAM. As a
consequence, an external VXI/VME device accessing the system RAM may get a
VXI/VME retry back. If the external VXI/VME device does not support VXI/VME retry,
the VXI/VME device will falsely detect the retry condition as a bus error condition.
VXI/VME devices that support retries will not have this problem, because they can handle
VXI/VME retry conditions correctly by automatically retrying the access. For example, the
National Instruments VXI-DAQ boards handle VXI/VME retry conditions properly, and
do not exhibit this problem.
© National Instruments Corporation
Enable Byte Swapping
This checkbox indicates whether byte swapping should be performed for
slave accesses to this half of the VXI/VME shared RAM space. For
example, if the native byte order of the shared RAM is Motorola
(big-endian), and you want to present data to the VXI/VMEbus in Intel
(little-endian) byte order, you will need to enable byte swapping. The
default value is non-swapped. Click on the checkbox if you want to enable
byte swapping.
This field is ignored if the Memory Select field is set to Onboard memory.
Memory Select
This option determines where this half of the VXI/VME shared RAM is
mapped. By default, the shared RAM is mapped to System memory. If you
want to use the RAM on the PCI-MXI-2, choose the Onboard memory
option.
Window Mapping
You can click on the checkbox at the bottom of the screen if you want to
map both halves of the inward window to the same address. When both
halves of the inward window are mapped to the same destination with the
same byte order, the windows essentially form one continuous window. If
the windows are mapped to different destinations, the base of each inward
window maps to the base of each destination.
If the windows both map to the shared RAM destination but the byte order
is different, the base of each inward window maps to the base of the shared
RAM destination. This results in one half of the window accessing the
system RAM in little-endian byte order and the other half accessing it in
big-endian byte order.
Chapter 6
6-9
NI-VXI Configuration Utility
PCI-MXI-2 for Linux
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