Vxibus Logical Address - National Instruments MXI Series Getting Started

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Chapter 3
VXI-MXI-2 Configuration and Installation

VXIbus Logical Address

PCI-MXI-2 for Linux
Each device in a VXIbus/MXIbus system is assigned a unique number
between 0 and 254. This 8-bit number, called the logical address, defines
the base address for the VXI configuration registers located on the device.
With unique logical addresses, each VXIbus device in the system is
assigned 64 bytes of configuration space in the upper 16 KB of A16 space.
Logical address 0 is reserved for the Resource Manager in the VXIbus
system. Because the VXI-MXI-2 cannot act as a Resource Manager, do not
configure the VXI-MXI-2 with a logical address of 0.
Some VXIbus devices have dynamically configurable logical addresses.
These devices have an initial logical address of hex FF or 255, which
indicates that they can be dynamically configured. While the VXI-MXI-2
does support dynamic configuration of VXI devices within its mainframe,
it is itself a statically configured device and is preset at the factory with a
VXI logical address of 1.
Ensure that no other statically configurable VXIbus devices have a logical
address of 1. If they do, change the logical address setting of either the
VXI-MXI-2 or the other device so that every device in the system has a
unique associated logical address.
You can change the logical address of the VXI-MXI-2 by changing the
setting of the 8-bit DIP switch labeled LOGICAL ADDRESS SWITCH
(location designator U43) on the panel. The down position of the DIP
switch corresponds to a logic value of 0 and the up position corresponds
to a logic value of 1. Verify that the VXI-MXI-2 does not have the same
logical address as any other statically configured VXIbus device in your
system. Remember that logical addresses hex 0 and FF are not allowed for
the VXI-MXI-2. Also, when setting logical addresses, keep in mind the
grouping requirements set by the system hierarchy. Refer to VXI-6, VXIbus
Mainframe Extender Specification, for more information about setting
logical addresses on a multimainframe hierarchy.
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