Hardware Description - National Instruments MXI Series Getting Started

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Chapter 1
Introduction and Quick Start
In the remainder of this manual, the term MXIbus refers to MXI-2.
Note

Hardware Description

D-size VXI mainframes have connections for a P3 connector. The VXI-MXI-2,
Note
however, does not have this connector and, if configured as a Slot 0 controller, cannot
provide the necessary control for VXI devices that need P3 support.
PCI-MXI-2 for Linux
CPU interface in all MXI-2 products using a single cable. Thus, MXI-2 lets
CPU interface boards such as the PCI-MXI-2 have access to these signals
as if they were plugged directly into the VXI/VME backplane.
In addition, MXI-2 boosts data throughput performance past
previous-generation MXIbus products by defining new high-performance
protocols. MXI-2 is a superset of MXI. All accesses initiated by MXI
devices will work with MXI-2 devices. However, MXI-2 defines
synchronous MXI block data transfers which surpass previous block data
throughput benchmarks. The new synchronous MXI block protocol
increases MXI-2 throughput to a maximum of 33 MB/s between two
MXI-2 devices. All National Instruments MXI-2 boards can initiate and
respond to synchronous MXI block cycles.
The PCI-MXI-2 is a half-size, PCI-compatible plug-in circuit board that
plugs into one of the expansion slots in your PCI-based computer. It links
your PCI-based computer directly to the MXIbus and vice versa. Because
the PCI-MXI-2 uses the same communication register set that other
VXIbus message-based devices use, other MXIbus devices view the
PCI-MXI-2 as a VXIbus device. The PCI-MXI-2 can also function as the
MXIbus System Controller and can terminate the MXIbus signals directly
on the PCI-MXI-2. In addition, you can have onboard DRAM on the
PCI-MXI-2 that can be shared with the MXIbus and VXI/VMEbus and
used as a dedicated data buffer.
The VXI-MXI-2 module is an extended-class, register-based VXIbus
device with optional VXIbus Slot 0 capability so that it can reside in any
slot in a C-size or D-size chassis.
The VXI-MXI-2 uses address mapping to convert MXIbus cycles into
VXIbus cycles and vice versa. By connecting to the PCI-MXI-2 board,
the VXI-MXI-2 links the PCI bus to the VXIbus. The VXI-MXI-2 can
automatically determine if it is located in VXI Slot 0 and/or if it is the
MXIbus System Controller.
1-4
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