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GPIB-SBX
National Instruments GPIB-SBX Manuals
Manuals and User Guides for National Instruments GPIB-SBX. We have
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National Instruments GPIB-SBX manual available for free PDF download: User Manual
National Instruments GPIB-SBX User Manual (138 pages)
Brand:
National Instruments
| Category:
Control Unit
| Size: 0.63 MB
Table of Contents
Table of Contents
7
Introduction
12
Optional Equipment
12
What Your Kit Should Contain
12
Electrical Specifications
13
General Description
13
GPIB-SBX Specifications
13
Physical Specifications
13
Table 2-1. Electrical Connections of the GPIB-SBX Interface
13
Table 2-2. Loading on Incoming SBX Signal Lines
14
Table 2-3. Drive Capability of Output SBX Signal Lines
14
SBX Interface Bus Signals
15
Table 2-4. GPIB-SBX Connector Pin Assignments
15
Address and Chip Select Lines (MA2-MA0, MCS1*-MCS0*)
17
Clock Line (MCLK)
17
Command Lines (IORD*, IOWRT*)
17
Control Lines
17
DMA Lines (MDRQT, MDACK*, TDMA)
17
Initialize Line (MRESET)
17
System Control Lines (MWAIT*, MPST*)
17
Data Lines (MD7-MD0)
18
Interrupt Line (MINTR1-MINTR0)
18
Power and Ground Lines (+5 V, +-12 V, GND)
18
Table 2-5. GPIB-SBX Internal Registers
18
Data Transfer Modes and Performance
19
Description of the General Purpose Interface Bus (GPIB)
19
GPIB Operation
19
GPIB Signal Lines
20
GPIB Physical Characteristics
22
GPIB-SBX Functional Description
22
Figure 2-1. GPIB-SBX with a Multibus Computer
23
Figure 2-2. GPIB-SBX in a Multiprocessor Application
24
Figure 2-3. GPIB-SBX Block Diagram
25
Table 2-6. GPIB-SBX IEEE-488 Interface Capabilities
26
Configuration
29
Configuration and Installation
29
Figure 3-1. GPIB Cable Shield Grounding
29
Installation
29
Figure 3-2. GPIB-SBX Installed on Host Board
30
Cabling
31
Figure 3-3. GPIB Cable Connector
31
Figure 3-4. GPIB-SBX Cable-To-Interface Board Connection
32
Verification Testing
32
Introduction
33
Register Descriptions
33
Table 4-1. Clues to Understanding Mnemonics
33
Terminology
33
Interface Registers
34
Figure 4-1. GPIB-SBX Interface Registers
35
Figure 4-2. Writing to the Hidden Registers
36
Data in Register (DIR)
37
Command/Data out Register (CDOR)
38
Interrupt Mask Register 1 (IMR1)
39
Interrupt Status Register 1 (ISR1)
39
Interrupt Mask Register 2 (IMR2)
45
Interrupt Status Register 2 (ISR2)
45
Serial Poll Mode Register (SPMR)
49
Serial Poll Status Register (SPSR)
49
Address Status Register (ADSR)
50
Address Mode Register (ADMR)
52
Command Pass through Register (CPTR)
55
Auxiliary Mode Register (AUXMR)
56
Table 4-2. Auxiliary Command Summary
57
Table 4-3. Auxiliary Commands: Detail Description
58
Hidden Registers
63
Internal Counter Register (ICR)
63
Parallel Poll Register (PPR)
64
Table 4-4. Examples for Configuring the PPR
65
Auxiliary Register a (AUXRA)
66
Auxiliary Register B (AUXRB)
68
Auxiliary Register E (AUXRE)
70
Address Register 0 (ADR0)
71
Address Register (ADR)
72
Address Register 1 (ADR1)
73
End of String Register (EOSR)
75
Initialization
76
Programming Considerations
76
Becoming Controller-In-Charge (CIC) and Active Controller
77
The GPIB-SBX as GPIB Controller
77
Going from Active to Standby Controller
78
Sending Remote Multiline Messages (Commands)
78
Going from Active to Idle Controller
79
Going from Standby to Active Controller
79
Address Mode 1
80
Addressed Implementation of Talker and Listener
80
Programmed Implementation of Talker and Listener
80
The GPIB-SBX as GPIB Talker and Listener
80
Address Mode 2
81
Address Mode 3
81
Sending and Receiving Data (Programmed I/O Mode)
82
Sending/Receiving Messages
82
Sending and Receiving Data (DMA Mode)
83
Sending END or EOS
83
Serial Polls
83
Terminating on END or EOS
83
Conducting Serial Polls
84
Parallel Polls
84
Responding to a Serial Poll
84
Conducting a Parallel Poll
85
Interrupts
86
Responding to a Parallel Poll
86
Chapter 6 Theory of Operation
87
SBX Bus Interface
87
GPIB Talker/Listener/Controller (TLC)
88
GPIB Interface
89
Diagnostic and Troubleshooting Test Procedures
90
Interpreting Test Procedures
90
GPIB-SBX Hardware Installation Tests
91
Parts List and Schematic Diagram
93
Appendix B Sample Programs
97
Multiline Interface Messages
115
Appendix D Mnemonics Key
118
Index
127
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