Block Diagram Of The 8/16-Bit Up/Down Counter/Timer - Fujitsu MB91150 Series Hardware Manual

CHAPTER 6 8/16-BIT UP/DOWN COUNTER/TIMER
6.2

Block Diagram of the 8/16-bit Up/Down Counter/Timer

This section provides block diagrams of the 8/16-bit up/down counter/timer.
I Block diagram of the 8/16-bit up/down counter/timer
❍ Channel 0
Figure 6.2-1 "Block diagram of the 8/16-bit up/down counter/timer (channel 0)" shows a block
diagram of the 8/16-bit up/down counter/timer (for Channel 0).
Figure 6.2-1 Block diagram of the 8/16-bit up/down counter/timer (channel 0)
CGE1 CGE0
Detects edge or level
ZIN0
UDCC
CES1
CMS1
AIN0
Select up or down
counter clock
BIN0
Prescaler
CLKS
166
Data bus
8bit
RCR0 (Reload/compare register 0)
C/GS
RCUT
UCRE
Clear counter
8bit
UDCR0 (Up/down count register 0)
CES0
CMS0
UDF1 UDF0
CSTR
Output interrupt
Control reload
RLDE
UDFF
CITE
Count clock
CDCF CFIE
Carry
CMPF
OVFF
UDIE