Cpu Specifications - Omron SYSMAC C500 Installation Manual

Specifications

CPU Specifications

Programming Method
Instruction Length
Number of Instructions
Execution Time
Memory Capacity
I/O bits
IR bits
SR bits
TR bits
HR bits
LR bits
Timers/Counters
DM words
Control Input Signal
Control Output Signal
Memory Protection
Battery Life
Self-diagnostic Functions
Program Check
58
Ladder diagram
1 address/instruction, (1 to 4 words/instruction)
71 (12 basic instructions + 59 special instructions)
µ
3 to 8 s (basic instructions)/22 to 504
24K words
512 (0000 through 3115)
416 (3200 through 5715)
88 (5800 through 6307)
8 (0 through 7)
512 (0000 through 3115)
512 (0000 through 3115) PC Link: max. configuration 8 PCs
128 (TIM/CNT 000 through 127)
TIMs: 0 through 999.9 s
TIMHs: 0 through 99.99 s
CNT: 0 through 9999 counts
512 (0000 through 511) 16 bits/word
START INPUT (in RUN mode, PC operates when contacts are closed and stops when
contacts are opened)
Input Voltage: 24 mA 24 VDC
RUN INPUT (Contacts are closed while PC is in RUN mode)
Max. switching capacity:
0.5 A 250 VAC (inductive load, cos of phase angle= 0.4)
2 A 24 VDC
Status of HR bits, preset value of counters (CNT), and contents of data memory (DM) are
retained during power failure. Length of memory protection depends on the Memory Pack
model being used (refer to Section 2-8 Memory Packs ).
4 years at 25 C, battery life is shortened at temperatures higher than 25 C. Replace battery
with new one within 1 week when ALARM indicator blinks.
CPU failure (watchdog timer)
Battery failure
Cycle time error
Memory failure
I/O bus failure, etc.
Program check (executed on start of RUN operation):
END missing
JMP-JME error
Coil duplication
Circuit error
DIFU/DIFD over error
IL/ILC error
(Program can be checked by Programming Console or GPC.)
µ
s (special instructions)
2 A 250 VAC (resistive load)
Appendix B