I/O PORTS
PORT 4 AND 5 CIRCUIT DIAGRAM
PUMOD.x
Px.0
Px.1
Px.2
Px.3
NOTE:
10-10
V
DD
When a port pin acts as an output, its pull-up resistor is automatically
disabled, even though the port's pull-up resistor is enabled by bit settings
to the pull-up resistor mode register (PUMOD).
Figure 10-5. Port 4 and 5 Circuit Diagram
PNEx.3
PNEx.2
PNEx.1
PNEx.0
CMOS Push-Pull or
N-Channel Open-Deain
KS57C2308/P2308/C2316/P2316
x = port number (4, 5)
PM.x
Output
1, 4, 8
Latch
M
1, 4, 8
U
X