Samsung KS57C2308 Manual page 182

OSCILLATOR CIRCUITS
CLOCK OUTPUT MODE REGISTER (CLMOD)
The clock output mode register, CLMOD, is a 4-bit register that is used to enable or disable clock output to the
CLO pin and to select the CPU clock source and frequency. CLMOD is addressable by 4-bit write instructions
only.
FD0H CLMOD.3
clears CLMOD to logic zero, which automatically selects the CPU clock as the clock source (without
RESET
initiating clock oscillation), and disables clock output.
CLMOD.3 is the enable/disable clock output control bit; CLMOD.1 and CLMOD.0 are used to select one of four
possible clock sources and frequencies: normal CPU clock, fxx/8, fxx/16, or fxx/64.
CLMOD Bit Settings
CLMOD.1 CLMOD.0
0
0
1
1
CLMOD.3
0
1
NOTE: Assumes that fxx = 4.19 MHz.
6-12
"0" CLMOD.1
Table 6-7. Clock Output Mode Register (CLMOD) Organization
0 CPU clock (fx/4, fx/8, fx/64, fxt/4)
1
0
1
Clock output is disabled
Clock output is enabled
CLMOD.0
Resulting Clock Output
Clock Source
fxx/8
fxx/16
fxx/64
Result of CLMOD.3 Setting
KS57C2308/P2308/C2316/P2316
CLMOD
Frequency
1.05 MHz, 524 kHz, 65.5 kHz
524 kHz
262 kHz
65.5 kHz