Samsung KS57C2308 Manual page 183

KS57C2308/P2308/C2316/P2316
CLOCK OUTPUT CIRCUIT
The clock output circuit, used to output clock pulses to the CLO pin, has the following components:
— 4-bit clock output mode register (CLMOD)
— Clock selector
— Port mode flag
— CLO output pin (P2.2)
CLMOD.3
CLMOD.2
4
CLMOD.1
CLMOD.0
CLOCK OUTPUT PROCEDURE
The procedure for outputting clock pulses to the CLO pin may be summarized as follows:
1. Disable clock output by clearing CLMOD.3 to logic zero.
2. Set the clock output frequency (CLMOD.1, CLMOD.0).
3. Load "0" to the output latch of the CLO pin (P2.2).
4. Set the P2.2 mode flag (PM2) to output mode.
5. Enable clock output by setting CLMOD.3 to logic one.
Clock
Selector
clocks
(fxx/8, fxx/16, fxx/64, CPU clock)
Figure 6-7. CLO Output Pin Circuit Diagram
P2.2 OUTPUT LATCH
OSCILLATOR CIRCUITS
CLO
PM 2
6-13